writel 137 arch/x86/kernel/amd_iommu.c writel(head, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET);
writel 174 arch/x86/kernel/amd_iommu.c writel(tail, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
writel 231 arch/x86/kernel/amd_iommu.c writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET);
writel 232 arch/x86/kernel/amd_iommu_init.c writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET);
writel 241 arch/x86/kernel/amd_iommu_init.c writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET);
writel 249 arch/x86/kernel/early_printk.c writel(ctrl | DBGP_DONE, &ehci_debug->control);
writel 275 arch/x86/kernel/early_printk.c writel(ctrl | DBGP_GO, &ehci_debug->control);
writel 310 arch/x86/kernel/early_printk.c writel(lo, &ehci_debug->data03);
writel 311 arch/x86/kernel/early_printk.c writel(hi, &ehci_debug->data47);
writel 348 arch/x86/kernel/early_printk.c writel(addr, &ehci_debug->address);
writel 349 arch/x86/kernel/early_printk.c writel(pids, &ehci_debug->pids);
writel 377 arch/x86/kernel/early_printk.c writel(addr, &ehci_debug->address);
writel 378 arch/x86/kernel/early_printk.c writel(pids, &ehci_debug->pids);
writel 418 arch/x86/kernel/early_printk.c writel(addr, &ehci_debug->address);
writel 419 arch/x86/kernel/early_printk.c writel(pids, &ehci_debug->pids);
writel 502 arch/x86/kernel/early_printk.c writel(portsc, &ehci_regs->port_status[port - 1]);
writel 513 arch/x86/kernel/early_printk.c writel(portsc & ~(PORT_RWC_BITS | PORT_RESET),
writel 631 arch/x86/kernel/early_printk.c writel(cmd, &ehci_regs->command);
writel 646 arch/x86/kernel/early_printk.c writel(ctrl, &ehci_debug->control);
writel 652 arch/x86/kernel/early_printk.c writel(cmd, &ehci_regs->command);
writel 655 arch/x86/kernel/early_printk.c writel(FLAG_CF, &ehci_regs->configured_flag);
writel 680 arch/x86/kernel/early_printk.c writel(ctrl, &ehci_debug->control);
writel 684 arch/x86/kernel/early_printk.c writel(ctrl & ~DBGP_CLAIM, &ehci_debug->control);
writel 692 arch/x86/kernel/early_printk.c writel(portsc, &ehci_regs->port_status[debug_port - 1]);
writel 753 arch/x86/kernel/early_printk.c writel(ctrl, &ehci_debug->control);
writel 35 arch/x86/kernel/hpet.c writel(d, hpet_virt_address + a);
writel 129 arch/x86/kernel/io_apic_32.c writel(reg, &io_apic->index);
writel 136 arch/x86/kernel/io_apic_32.c writel(reg, &io_apic->index);
writel 137 arch/x86/kernel/io_apic_32.c writel(value, &io_apic->data);
writel 150 arch/x86/kernel/io_apic_32.c writel(reg, &io_apic->index);
writel 151 arch/x86/kernel/io_apic_32.c writel(value, &io_apic->data);
writel 161 arch/x86/kernel/io_apic_64.c writel(reg, &io_apic->index);
writel 168 arch/x86/kernel/io_apic_64.c writel(reg, &io_apic->index);
writel 169 arch/x86/kernel/io_apic_64.c writel(value, &io_apic->data);
writel 179 arch/x86/kernel/io_apic_64.c writel(value, &io_apic->data);
writel 600 arch/x86/kernel/pci-calgary_64.c writel(0, target);
writel 622 arch/x86/kernel/pci-calgary_64.c writel(aer, target);
writel 646 arch/x86/kernel/pci-calgary_64.c writel(cpu_to_be32(val), target);
writel 700 arch/x86/kernel/pci-calgary_64.c writel(cpu_to_be32(val), target);
writel 959 arch/x86/kernel/pci-calgary_64.c writel(0, target);
writel 966 arch/x86/kernel/pci-calgary_64.c writel(cpu_to_be32(val32), target);
writel 1019 arch/x86/kernel/pci-calgary_64.c writel(cpu_to_be32(val), target);
writel 1058 arch/x86/kernel/pci-calgary_64.c writel(cpu_to_be32(val32), target);
writel 1085 arch/x86/kernel/pci-calgary_64.c writel(cpu_to_be32(val32), target);
writel 87 arch/x86/kernel/quirks.c writel(val | 0x80, rcba_base + 0x3404);
writel 138 arch/x86/kernel/quirks.c writel(val | 0x80, rcba_base + 0x3404);
writel 100 arch/x86/kernel/vsmp_64.c writel(ctl, address + 4);
writel 34 arch/x86/pci/numaq_32.c writel(val, XQUAD_PORT_ADDR(0xcf8, BUS2QUAD(bus)));
writel 106 arch/x86/pci/numaq_32.c writel(value, adr + reg);
writel 116 include/asm-cris/io.h #define __raw_writel writel
writel 35 include/asm-generic/ide_iops.h writel(*(u32 *)addr, port);
writel 163 include/asm-m32r/io.h #define __raw_writel writel
writel 67 include/asm-mn10300/io.h #define __raw_writel writel
writel 110 include/asm-mn10300/io.h return writel(b, (volatile void __iomem *) addr);
writel 193 include/asm-mn10300/io.h #define iowrite32(v, addr) writel((v), (addr))
writel 54 include/asm-um/io.h #define __raw_writel writel
writel 142 include/asm-xtensa/io.h #define outl(val, port) writel((val),(u32 *)((unsigned long)(port)))
writel 24 include/drm/drm_os_linux.h #define DRM_WRITE32(map, offset, val) writel(val, ((void __iomem *)(map)->handle) + (offset))
writel 531 include/linux/cyclades.h #define cy_writel(port,val) do { writel((val), (port)); mb(); } while (0)
writel 1142 include/linux/i2o.h writel(mmsg->mfa, c->in_port);
writel 1184 include/linux/i2o.h writel(mfa, c->in_port);
writel 1217 include/linux/i2o.h writel(m, c->out_port);
writel 22 include/media/saa7146.h #define saa7146_write(sxy,adr,dat) writel((dat),(sxy->mem+(adr)))
writel 230 include/video/tgafb.h writel(v, par->tga_regs_base +r);
writel 126 lib/iomap.c IO_COND(addr, outl(val,port), writel(val, addr));
writel 55 sound/arm/aaci.c writel(maincr, aaci->base + AACI_MAINCR);
writel 85 sound/arm/aaci.c writel(val << 4, aaci->base + AACI_SL2TX);
writel 86 sound/arm/aaci.c writel(reg << 12, aaci->base + AACI_SL1TX);
writel 122 sound/arm/aaci.c writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX);
writel 198 sound/arm/aaci.c writel(ICLR_RXOEC1 << channel, aaci->base + AACI_INTCLR);
writel 203 sound/arm/aaci.c writel(ICLR_RXTOFEC1 << channel, aaci->base + AACI_INTCLR);
writel 212 sound/arm/aaci.c writel(0, aacirun->base + AACI_IE);
writel 257 sound/arm/aaci.c writel(ICLR_TXUEC1 << channel, aaci->base + AACI_INTCLR);
writel 266 sound/arm/aaci.c writel(0, aacirun->base + AACI_IE);
writel 658 sound/arm/aaci.c writel(ie, aacirun->base + AACI_IE);
writel 661 sound/arm/aaci.c writel(aacirun->cr, aacirun->base + AACI_TXCR);
writel 673 sound/arm/aaci.c writel(ie, aacirun->base + AACI_IE);
writel 674 sound/arm/aaci.c writel(aacirun->cr, aacirun->base + AACI_TXCR);
writel 759 sound/arm/aaci.c writel(ie, aacirun->base+AACI_IE);
writel 763 sound/arm/aaci.c writel(aacirun->cr, aacirun->base + AACI_RXCR);
writel 778 sound/arm/aaci.c writel(aacirun->cr, aacirun->base + AACI_RXCR);
writel 782 sound/arm/aaci.c writel(ie, aacirun->base + AACI_IE);
writel 943 sound/arm/aaci.c writel(0, aaci->base + AACI_RESET);
writel 945 sound/arm/aaci.c writel(RESET_NRST, aaci->base + AACI_RESET);
writel 1051 sound/arm/aaci.c writel(CR_FEN | CR_SZ16 | CR_EN, aacirun->base + AACI_TXCR);
writel 1054 sound/arm/aaci.c writel(0, aacirun->fifo);
writel 1056 sound/arm/aaci.c writel(0, aacirun->base + AACI_TXCR);
writel 1063 sound/arm/aaci.c writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR);
writel 1064 sound/arm/aaci.c writel(aaci->maincr, aaci->base + AACI_MAINCR);
writel 1112 sound/arm/aaci.c writel(0, base + AACI_IE);
writel 1113 sound/arm/aaci.c writel(0, base + AACI_TXCR);
writel 1114 sound/arm/aaci.c writel(0, base + AACI_RXCR);
writel 1117 sound/arm/aaci.c writel(0x1fff, aaci->base + AACI_INTCLR);
writel 1118 sound/arm/aaci.c writel(aaci->maincr, aaci->base + AACI_MAINCR);
writel 1164 sound/arm/aaci.c writel(0, aaci->base + AACI_MAINCR);
writel 1254 sound/oss/msnd_pinnacle.c writel(0x00010000, dev.SMA + SMA_dwCurrPlayPitch);
writel 1255 sound/oss/msnd_pinnacle.c writel(0x00000001, dev.SMA + SMA_dwCurrPlayRate);
writel 133 sound/pci/ad1889.c writel(val, chip->iobase + reg);
writel 322 sound/pci/atiixp.c writel(data, addr);
writel 330 sound/pci/atiixp.c writel(value, chip->remap_addr + ATI_REG_##reg)
writel 381 sound/pci/atiixp.c writel(0, chip->remap_addr + dma->ops->llp_offset);
writel 403 sound/pci/atiixp.c writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
writel 419 sound/pci/atiixp.c writel(0, chip->remap_addr + dma->ops->llp_offset);
writel 1512 sound/pci/atiixp.c writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
writel 1514 sound/pci/atiixp.c writel(dma->saved_curptr, chip->remap_addr +
writel 291 sound/pci/atiixp_modem.c writel(data, addr);
writel 299 sound/pci/atiixp_modem.c writel(value, chip->remap_addr + ATI_REG_##reg)
writel 349 sound/pci/atiixp_modem.c writel(0, chip->remap_addr + dma->ops->llp_offset);
writel 371 sound/pci/atiixp_modem.c writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
writel 388 sound/pci/atiixp_modem.c writel(0, chip->remap_addr + dma->ops->llp_offset);
writel 41 sound/pci/au88x0/au88x0.h #define hwwrite(x,y,z) writel((z),(x)+(y))
writel 43 sound/pci/aw2/aw2-saa7146.c #define WRITEREG(value, addr) writel((value), chip->base_addr + (addr))
writel 224 sound/pci/bt87x.c writel(value, chip->mmio + reg);
writel 517 sound/pci/cs4281.c writel(val, chip->ba0 + offset);
writel 1903 sound/pci/cs4281.c writel((unsigned int)cmd, port);
writel 1906 sound/pci/cs4281.c writel((unsigned int)val, port + 4);
writel 326 sound/pci/cs46xx/cs46xx_lib.c writel(*src++, dst);
writel 355 sound/pci/cs46xx/cs46xx_lib.c writel(0, dst);
writel 66 sound/pci/cs46xx/cs46xx_lib.h writel(val, chip->region.idx[bank+1].remap_addr + offset);
writel 78 sound/pci/cs46xx/cs46xx_lib.h writel(val, chip->region.name.ba0.remap_addr + offset);
writel 931 sound/pci/cs46xx/dsp_spos.c writel(task_data[i],spdst);
writel 945 sound/pci/cs46xx/dsp_spos.c writel(scb_data[i],spdst);
writel 176 sound/pci/cs46xx/dsp_spos_scb_lib.c writel(0, dst);
writel 488 sound/pci/echoaudio/echoaudio.h writel(value, &chip->dsp_registers[index]);
writel 432 sound/pci/hda/hda_intel.c writel(value, (chip)->remap_addr + ICH6_REG_##reg)
writel 445 sound/pci/hda/hda_intel.c writel(value, (dev)->sd_addr + ICH6_REG_##reg)
writel 540 sound/pci/korg1212/korg1212.c writel(mailBox3Val, korg1212->mailbox3Ptr);
writel 541 sound/pci/korg1212/korg1212.c writel(mailBox2Val, korg1212->mailbox2Ptr);
writel 542 sound/pci/korg1212/korg1212.c writel(mailBox1Val, korg1212->mailbox1Ptr);
writel 543 sound/pci/korg1212/korg1212.c writel(mailBox0Val, korg1212->mailbox0Ptr);
writel 544 sound/pci/korg1212/korg1212.c writel(doorbellVal, korg1212->outDoorbellPtr); // interrupt the card
writel 774 sound/pci/korg1212/korg1212.c writel(PCI_INT_ENABLE_BIT |
writel 890 sound/pci/korg1212/korg1212.c writel(0, korg1212->statusRegPtr);
writel 930 sound/pci/korg1212/korg1212.c writel(0, korg1212->mailbox3Ptr);
writel 1128 sound/pci/korg1212/korg1212.c writel(doorbellValue, korg1212->inDoorbellPtr);
writel 173 sound/pci/mixart/mixart_core.c writel(0, MIXART_MEM(mgr, tailptr)); /* set address to zero on this fifo position */
writel 439 sound/pci/mixart/mixart_core.c writel(it_reg, MIXART_REG(mgr, MIXART_PCI_ODBR_OFFSET));
writel 576 sound/pci/mixart/mixart_core.c writel( 0, MIXART_MEM( mgr, MSG_HOST_RSC_PROTECTION ) );
writel 577 sound/pci/mixart/mixart_core.c writel( 0, MIXART_MEM( mgr, MSG_AGENT_RSC_PROTECTION ) );
writel 312 sound/pci/nm256/nm256.c writel(val, chip->cport + offset);
writel 405 sound/pci/rme32.c writel(rme32->wcreg | RME32_WCR_PD,
writel 407 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel 545 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel 576 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel 608 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel 650 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel 702 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel 731 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel 754 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel 782 sound/pci/rme32.c writel(0, rme32->iobase + RME32_IO_RESET_POS);
writel 786 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel 797 sound/pci/rme32.c writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
writel 802 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel 804 sound/pci/rme32.c writel(0, rme32->iobase + RME32_IO_RESET_POS);
writel 821 sound/pci/rme32.c writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
writel 861 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel 943 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel 1037 sound/pci/rme32.c writel(0, rme32->iobase + RME32_IO_RESET_POS);
writel 1041 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel 1057 sound/pci/rme32.c writel(0, rme32->iobase + RME32_IO_RESET_POS);
writel 1438 sound/pci/rme32.c writel(0, rme32->iobase + RME32_IO_RESET_POS);
writel 1444 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel 1603 sound/pci/rme32.c writel(val, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel 1828 sound/pci/rme32.c writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
writel 478 sound/pci/rme96.c writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel 481 sound/pci/rme96.c writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel 487 sound/pci/rme96.c writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel 490 sound/pci/rme96.c writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel 508 sound/pci/rme96.c writel(rme96->wcreg | RME96_WCR_PD,
writel 510 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 534 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 569 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 713 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 756 sound/pci/rme96.c writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel 783 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 784 sound/pci/rme96.c writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel 834 sound/pci/rme96.c writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel 853 sound/pci/rme96.c writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel 855 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 905 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 923 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 943 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 992 sound/pci/rme96.c writel(rme96->wcreg |= rme96->wcreg_spdif_stream, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 1058 sound/pci/rme96.c writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
writel 1062 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 1070 sound/pci/rme96.c writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
writel 1074 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 1086 sound/pci/rme96.c writel(0, rme96->iobase + RME96_IO_CONFIRM_PLAY_IRQ);
writel 1089 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 1097 sound/pci/rme96.c writel(0, rme96->iobase + RME96_IO_CONFIRM_REC_IRQ);
writel 1100 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 1120 sound/pci/rme96.c writel(0, rme96->iobase + RME96_IO_CONFIRM_PLAY_IRQ);
writel 1125 sound/pci/rme96.c writel(0, rme96->iobase + RME96_IO_CONFIRM_REC_IRQ);
writel 1170 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 1237 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 1335 sound/pci/rme96.c writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
writel 1349 sound/pci/rme96.c writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
writel 1517 sound/pci/rme96.c writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel 1627 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 1628 sound/pci/rme96.c writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel 1631 sound/pci/rme96.c writel(rme96->areg | RME96_AR_PD2,
writel 1633 sound/pci/rme96.c writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel 1638 sound/pci/rme96.c writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
writel 1641 sound/pci/rme96.c writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
writel 1642 sound/pci/rme96.c writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
writel 1831 sound/pci/rme96.c writel(val, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 2150 sound/pci/rme96.c writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
writel 646 sound/pci/rme9652/hdsp.c writel(val, hdsp->iobase + reg);
writel 558 sound/pci/rme9652/hdspm.c writel(val, hdspm->iobase + reg);
writel 331 sound/pci/rme9652/rme9652.c writel(val, rme9652->iobase + reg);
writel 562 sound/pci/sis7019.c writel(format, ctrl_base + SIS_PLAY_DMA_FORMAT_CSO);
writel 563 sound/pci/sis7019.c writel(dma_addr, ctrl_base + SIS_PLAY_DMA_BASE);
writel 564 sound/pci/sis7019.c writel(control, ctrl_base + SIS_PLAY_DMA_CONTROL);
writel 565 sound/pci/sis7019.c writel(sso_eso, ctrl_base + SIS_PLAY_DMA_SSO_ESO);
writel 568 sound/pci/sis7019.c writel(0, wave_base + reg);
writel 570 sound/pci/sis7019.c writel(SIS_WAVE_GENERAL_WAVE_VOLUME, wave_base + SIS_WAVE_GENERAL);
writel 571 sound/pci/sis7019.c writel(delta << 16, wave_base + SIS_WAVE_GENERAL_ARTICULATION);
writel 572 sound/pci/sis7019.c writel(SIS_WAVE_CHANNEL_CONTROL_FIRST_SAMPLE |
writel 805 sound/pci/sis7019.c writel(format, play_base + SIS_PLAY_DMA_FORMAT_CSO);
writel 806 sound/pci/sis7019.c writel(sis->silence_dma_addr, play_base + SIS_PLAY_DMA_BASE);
writel 807 sound/pci/sis7019.c writel(control, play_base + SIS_PLAY_DMA_CONTROL);
writel 808 sound/pci/sis7019.c writel(sso_eso, play_base + SIS_PLAY_DMA_SSO_ESO);
writel 811 sound/pci/sis7019.c writel(0, wave_base + reg);
writel 813 sound/pci/sis7019.c writel(SIS_WAVE_GENERAL_WAVE_VOLUME, wave_base + SIS_WAVE_GENERAL);
writel 814 sound/pci/sis7019.c writel(delta << 16, wave_base + SIS_WAVE_GENERAL_ARTICULATION);
writel 815 sound/pci/sis7019.c writel(SIS_WAVE_CHANNEL_CONTROL_FIRST_SAMPLE |
writel 856 sound/pci/sis7019.c writel(format, rec_base + SIS_CAPTURE_DMA_FORMAT_CSO);
writel 857 sound/pci/sis7019.c writel(dma_addr, rec_base + SIS_CAPTURE_DMA_BASE);
writel 858 sound/pci/sis7019.c writel(control, rec_base + SIS_CAPTURE_DMA_CONTROL);
writel 1152 sound/pci/sis7019.c writel(i, SIS_MIXER_START_ADDR(ioaddr, i));
writel 1153 sound/pci/sis7019.c writel(SIS_MIXER_RIGHT_NO_ATTEN | SIS_MIXER_LEFT_NO_ATTEN |
writel 75 sound/pci/ymfpci/ymfpci_main.c writel(val, chip->reg_area_virt + offset);
writel 115 sound/sh/aica.c writel(what, toi + SPU_MEMORY_BASE);
writel 136 sound/sh/aica.c writel(val, to);
writel 154 sound/sh/aica.c writel(regval, ARM_RESET_REGISTER);
writel 162 sound/sh/aica.c writel(regval, SPU_REGISTER_BASE + (i * 0x80));
writel 175 sound/sh/aica.c writel(regval, ARM_RESET_REGISTER);
writel 201 sound/sh/aica.c writel(AICA_CMD_KICK | AICA_CMD_START, (u32 *) AICA_CONTROL_POINT);
writel 211 sound/sh/aica.c writel(AICA_CMD_KICK | AICA_CMD_STOP, (u32 *) AICA_CONTROL_POINT);
writel 154 sound/soc/s3c24xx/s3c2412-i2s.c writel(con, regs + S3C2412_IISCON);
writel 155 sound/soc/s3c24xx/s3c2412-i2s.c writel(mod, regs + S3C2412_IISMOD);
writel 181 sound/soc/s3c24xx/s3c2412-i2s.c writel(mod, regs + S3C2412_IISMOD);
writel 182 sound/soc/s3c24xx/s3c2412-i2s.c writel(con, regs + S3C2412_IISCON);
writel 224 sound/soc/s3c24xx/s3c2412-i2s.c writel(mod, regs + S3C2412_IISMOD);
writel 225 sound/soc/s3c24xx/s3c2412-i2s.c writel(con, regs + S3C2412_IISCON);
writel 248 sound/soc/s3c24xx/s3c2412-i2s.c writel(con, regs + S3C2412_IISCON);
writel 249 sound/soc/s3c24xx/s3c2412-i2s.c writel(mod, regs + S3C2412_IISMOD);
writel 340 sound/soc/s3c24xx/s3c2412-i2s.c writel(iismod, s3c2412_i2s.regs + S3C2412_IISMOD);
writel 371 sound/soc/s3c24xx/s3c2412-i2s.c writel(iismod, s3c2412_i2s.regs + S3C2412_IISMOD);
writel 388 sound/soc/s3c24xx/s3c2412-i2s.c writel(capture ? S3C2412_IISFIC_RXFLUSH : S3C2412_IISFIC_TXFLUSH,
writel 392 sound/soc/s3c24xx/s3c2412-i2s.c writel(0x0, s3c2412_i2s.regs + S3C2412_IISFIC);
writel 524 sound/soc/s3c24xx/s3c2412-i2s.c writel(iismod, s3c2412_i2s.regs + S3C2412_IISMOD);
writel 543 sound/soc/s3c24xx/s3c2412-i2s.c writel(reg | div, i2s->regs + S3C2412_IISMOD);
writel 576 sound/soc/s3c24xx/s3c2412-i2s.c writel(reg | div, i2s->regs + S3C2412_IISMOD);
writel 582 sound/soc/s3c24xx/s3c2412-i2s.c writel((div << 8) | S3C2412_IISPSR_PSREN,
writel 585 sound/soc/s3c24xx/s3c2412-i2s.c writel(0x0, i2s->regs + S3C2412_IISPSR);
writel 687 sound/soc/s3c24xx/s3c2412-i2s.c writel(i2s->suspend_iiscon, i2s->regs + S3C2412_IISCON);
writel 688 sound/soc/s3c24xx/s3c2412-i2s.c writel(i2s->suspend_iismod, i2s->regs + S3C2412_IISMOD);
writel 689 sound/soc/s3c24xx/s3c2412-i2s.c writel(i2s->suspend_iispsr, i2s->regs + S3C2412_IISPSR);
writel 691 sound/soc/s3c24xx/s3c2412-i2s.c writel(S3C2412_IISFIC_RXFLUSH | S3C2412_IISFIC_TXFLUSH,
writel 695 sound/soc/s3c24xx/s3c2412-i2s.c writel(0x0, i2s->regs + S3C2412_IISFIC);
writel 63 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_codec_cmd, s3c24xx_ac97.regs + S3C_AC97_CODEC_CMD);
writel 69 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_glbctrl, s3c24xx_ac97.regs + S3C_AC97_GLBCTRL);
writel 97 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_codec_cmd, s3c24xx_ac97.regs + S3C_AC97_CODEC_CMD);
writel 103 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_glbctrl, s3c24xx_ac97.regs + S3C_AC97_GLBCTRL);
writel 109 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_codec_cmd, s3c24xx_ac97.regs + S3C_AC97_CODEC_CMD);
writel 121 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_glbctrl, s3c24xx_ac97.regs + S3C_AC97_GLBCTRL);
writel 125 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_glbctrl, s3c24xx_ac97.regs + S3C_AC97_GLBCTRL);
writel 135 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_glbctrl, s3c24xx_ac97.regs + S3C_AC97_GLBCTRL);
writel 139 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_glbctrl, s3c24xx_ac97.regs + S3C_AC97_GLBCTRL);
writel 144 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_glbctrl, s3c24xx_ac97.regs + S3C_AC97_GLBCTRL);
writel 148 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_glbctrl, s3c24xx_ac97.regs + S3C_AC97_GLBCTRL);
writel 153 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_glbctrl, s3c24xx_ac97.regs + S3C_AC97_GLBCTRL);
writel 166 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_glbctrl, s3c24xx_ac97.regs + S3C_AC97_GLBCTRL);
writel 238 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_glbctrl, s3c24xx_ac97.regs + S3C_AC97_GLBCTRL);
writel 242 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_glbctrl, s3c24xx_ac97.regs + S3C_AC97_GLBCTRL);
writel 247 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_glbctrl, s3c24xx_ac97.regs + S3C_AC97_GLBCTRL);
writel 251 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_glbctrl, s3c24xx_ac97.regs + S3C_AC97_GLBCTRL);
writel 310 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_glbctrl, s3c24xx_ac97.regs + S3C_AC97_GLBCTRL);
writel 346 sound/soc/s3c24xx/s3c2443-ac97.c writel(ac_glbctrl, s3c24xx_ac97.regs + S3C_AC97_GLBCTRL);
writel 101 sound/soc/s3c24xx/s3c24xx-i2s.c writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
writel 102 sound/soc/s3c24xx/s3c24xx-i2s.c writel(iisfcon, s3c24xx_i2s.regs + S3C2410_IISFCON);
writel 103 sound/soc/s3c24xx/s3c24xx-i2s.c writel(iiscon, s3c24xx_i2s.regs + S3C2410_IISCON);
writel 118 sound/soc/s3c24xx/s3c24xx-i2s.c writel(iiscon, s3c24xx_i2s.regs + S3C2410_IISCON);
writel 119 sound/soc/s3c24xx/s3c24xx-i2s.c writel(iisfcon, s3c24xx_i2s.regs + S3C2410_IISFCON);
writel 120 sound/soc/s3c24xx/s3c24xx-i2s.c writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
writel 146 sound/soc/s3c24xx/s3c24xx-i2s.c writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
writel 147 sound/soc/s3c24xx/s3c24xx-i2s.c writel(iisfcon, s3c24xx_i2s.regs + S3C2410_IISFCON);
writel 148 sound/soc/s3c24xx/s3c24xx-i2s.c writel(iiscon, s3c24xx_i2s.regs + S3C2410_IISCON);
writel 163 sound/soc/s3c24xx/s3c24xx-i2s.c writel(iisfcon, s3c24xx_i2s.regs + S3C2410_IISFCON);
writel 164 sound/soc/s3c24xx/s3c24xx-i2s.c writel(iiscon, s3c24xx_i2s.regs + S3C2410_IISCON);
writel 165 sound/soc/s3c24xx/s3c24xx-i2s.c writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
writel 240 sound/soc/s3c24xx/s3c24xx-i2s.c writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
writel 270 sound/soc/s3c24xx/s3c24xx-i2s.c writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
writel 335 sound/soc/s3c24xx/s3c24xx-i2s.c writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
writel 352 sound/soc/s3c24xx/s3c24xx-i2s.c writel(reg | div, s3c24xx_i2s.regs + S3C2410_IISMOD);
writel 356 sound/soc/s3c24xx/s3c24xx-i2s.c writel(reg | div, s3c24xx_i2s.regs + S3C2410_IISMOD);
writel 359 sound/soc/s3c24xx/s3c24xx-i2s.c writel(div, s3c24xx_i2s.regs + S3C2410_IISPSR);
writel 361 sound/soc/s3c24xx/s3c24xx-i2s.c writel(reg | S3C2410_IISCON_PSCEN, s3c24xx_i2s.regs + S3C2410_IISCON);
writel 404 sound/soc/s3c24xx/s3c24xx-i2s.c writel(S3C2410_IISCON_IISEN, s3c24xx_i2s.regs + S3C2410_IISCON);
writel 434 sound/soc/s3c24xx/s3c24xx-i2s.c writel(s3c24xx_i2s.iiscon, s3c24xx_i2s.regs + S3C2410_IISCON);
writel 435 sound/soc/s3c24xx/s3c24xx-i2s.c writel(s3c24xx_i2s.iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
writel 436 sound/soc/s3c24xx/s3c24xx-i2s.c writel(s3c24xx_i2s.iisfcon, s3c24xx_i2s.regs + S3C2410_IISFCON);
writel 437 sound/soc/s3c24xx/s3c24xx-i2s.c writel(s3c24xx_i2s.iispsr, s3c24xx_i2s.regs + S3C2410_IISPSR);