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root/include/linux/dw_dmac.h

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DEFINITIONS

This source file includes following definitions.
  1. to_dw_dma_slave

/*
 * Driver for the Synopsys DesignWare DMA Controller (aka DMACA on
 * AVR32 systems.)
 *
 * Copyright (C) 2007 Atmel Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#ifndef DW_DMAC_H
#define DW_DMAC_H

#include <linux/dmaengine.h>

/**
 * struct dw_dma_platform_data - Controller configuration parameters
 * @nr_channels: Number of channels supported by hardware (max 8)
 */
struct dw_dma_platform_data {
        unsigned int    nr_channels;
};

/**
 * struct dw_dma_slave - Controller-specific information about a slave
 * @slave: Generic information about the slave
 * @ctl_lo: Platform-specific initializer for the CTL_LO register
 * @cfg_hi: Platform-specific initializer for the CFG_HI register
 * @cfg_lo: Platform-specific initializer for the CFG_LO register
 */
struct dw_dma_slave {
        struct dma_slave        slave;
        u32                     cfg_hi;
        u32                     cfg_lo;
};

/* Platform-configurable bits in CFG_HI */
#define DWC_CFGH_FCMODE         (1 << 0)
#define DWC_CFGH_FIFO_MODE      (1 << 1)
#define DWC_CFGH_PROTCTL(x)     ((x) << 2)
#define DWC_CFGH_SRC_PER(x)     ((x) << 7)
#define DWC_CFGH_DST_PER(x)     ((x) << 11)

/* Platform-configurable bits in CFG_LO */
#define DWC_CFGL_PRIO(x)        ((x) << 5)      /* priority */
#define DWC_CFGL_LOCK_CH_XFER   (0 << 12)       /* scope of LOCK_CH */
#define DWC_CFGL_LOCK_CH_BLOCK  (1 << 12)
#define DWC_CFGL_LOCK_CH_XACT   (2 << 12)
#define DWC_CFGL_LOCK_BUS_XFER  (0 << 14)       /* scope of LOCK_BUS */
#define DWC_CFGL_LOCK_BUS_BLOCK (1 << 14)
#define DWC_CFGL_LOCK_BUS_XACT  (2 << 14)
#define DWC_CFGL_LOCK_CH        (1 << 15)       /* channel lockout */
#define DWC_CFGL_LOCK_BUS       (1 << 16)       /* busmaster lockout */
#define DWC_CFGL_HS_DST_POL     (1 << 18)       /* dst handshake active low */
#define DWC_CFGL_HS_SRC_POL     (1 << 19)       /* src handshake active low */

static inline struct dw_dma_slave *to_dw_dma_slave(struct dma_slave *slave)
{
        return container_of(slave, struct dw_dma_slave, slave);
}

#endif /* DW_DMAC_H */

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