read_pci_config   316 arch/x86/kernel/amd_iommu_init.c 	cap = read_pci_config(bus, dev, fn, cap_ptr+MMIO_RANGE_OFFSET);
read_pci_config   169 arch/x86/kernel/aperture_64.c 	aper_low = read_pci_config(bus, slot, func, 0x10);
read_pci_config   170 arch/x86/kernel/aperture_64.c 	aper_hi = read_pci_config(bus, slot, func, 0x14);
read_pci_config   216 arch/x86/kernel/aperture_64.c 				class = read_pci_config(bus, slot, func,
read_pci_config   295 arch/x86/kernel/aperture_64.c 			if (!early_is_k8_nb(read_pci_config(bus, slot, 3, 0x00)))
read_pci_config   298 arch/x86/kernel/aperture_64.c 			ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL);
read_pci_config   302 arch/x86/kernel/aperture_64.c 			aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff;
read_pci_config   350 arch/x86/kernel/aperture_64.c 			if (!early_is_k8_nb(read_pci_config(bus, slot, 3, 0x00)))
read_pci_config   353 arch/x86/kernel/aperture_64.c 			ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL);
read_pci_config   391 arch/x86/kernel/aperture_64.c 			if (!early_is_k8_nb(read_pci_config(bus, slot, 3, 0x00)))
read_pci_config   397 arch/x86/kernel/aperture_64.c 			aper_order = (read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL) >> 1) & 7;
read_pci_config   399 arch/x86/kernel/aperture_64.c 			aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff;
read_pci_config   492 arch/x86/kernel/aperture_64.c 			if (!early_is_k8_nb(read_pci_config(bus, slot, 3, 0x00)))
read_pci_config    30 arch/x86/kernel/early-quirks.c 	htcfg = read_pci_config(num, slot, func, 0x68);
read_pci_config   107 arch/x86/kernel/early-quirks.c 	d = read_pci_config(num, slot, func, 0x70);
read_pci_config   111 arch/x86/kernel/early-quirks.c 	d = read_pci_config(num, slot, func, 0x8);
read_pci_config   460 arch/x86/kernel/early_printk.c 	class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
read_pci_config   569 arch/x86/kernel/early_printk.c 	dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
read_pci_config   582 arch/x86/kernel/early_printk.c 	vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
read_pci_config   797 arch/x86/kernel/early_printk.c 	debug_port = read_pci_config(bus, slot, func, cap);
read_pci_config   808 arch/x86/kernel/early_printk.c 	bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
read_pci_config    86 arch/x86/kernel/mmconf-fam10h_64.c 		id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID);
read_pci_config   126 arch/x86/kernel/mmconf-fam10h_64.c 		reg = read_pci_config(bus, slot, 1, 0x80 + (i << 3));
read_pci_config   131 arch/x86/kernel/mmconf-fam10h_64.c 		reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3));
read_pci_config  1340 arch/x86/kernel/pci-calgary_64.c 		val = read_pci_config(bus, dev, 0, 0);
read_pci_config  1380 arch/x86/kernel/pci-calgary_64.c 		val = read_pci_config(bus, 0, 0, 0);
read_pci_config  1465 arch/x86/kernel/pci-calgary_64.c 		val = read_pci_config(bus, 0, 0, 0);
read_pci_config    85 arch/x86/kernel/vsmp_64.c 	cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);
read_pci_config   124 arch/x86/kernel/vsmp_64.c 	if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID) ==
read_pci_config    34 arch/x86/mm/k8topology_64.c 		header = read_pci_config(0, num, 0, 0x00);
read_pci_config    40 arch/x86/mm/k8topology_64.c 		header = read_pci_config(0, num, 1, 0x00);
read_pci_config    97 arch/x86/mm/k8topology_64.c 	reg = read_pci_config(0, nb, 0, 0x60);
read_pci_config   109 arch/x86/mm/k8topology_64.c 		base = read_pci_config(0, nb, 1, 0x40 + i*8);
read_pci_config   110 arch/x86/mm/k8topology_64.c 		limit = read_pci_config(0, nb, 1, 0x44 + i*8);
read_pci_config   312 arch/x86/pci/amd_bus.c 		id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID);
read_pci_config   330 arch/x86/pci/amd_bus.c 		reg = read_pci_config(bus, slot, 1, 0xe0 + (i << 2));
read_pci_config   355 arch/x86/pci/amd_bus.c 	reg = read_pci_config(bus, slot, 0, 0x60);
read_pci_config   357 arch/x86/pci/amd_bus.c 	reg = read_pci_config(bus, slot, 0, 0x64);
read_pci_config   364 arch/x86/pci/amd_bus.c 		reg = read_pci_config(bus, slot, 1, 0xc0 + (i << 3));
read_pci_config   369 arch/x86/pci/amd_bus.c 		reg = read_pci_config(bus, slot, 1, 0xc4 + (i << 3));
read_pci_config   433 arch/x86/pci/amd_bus.c 		reg = read_pci_config(bus, slot, 1, 0x80 + (i << 3));
read_pci_config   439 arch/x86/pci/amd_bus.c 		reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3));
read_pci_config    78 arch/x86/pci/early.c 		val = read_pci_config(bus, slot, func, i);
read_pci_config    99 arch/x86/pci/early.c 				class = read_pci_config(bus, slot, func,
read_pci_config     9 include/asm-x86/pci-direct.h extern u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset);