CM_REG_MISC_CTRL 752 sound/pci/cmipci.c snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC); CM_REG_MISC_CTRL 755 sound/pci/cmipci.c snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC); CM_REG_MISC_CTRL 1201 sound/pci/cmipci.c snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_AC3EN2); CM_REG_MISC_CTRL 1207 sound/pci/cmipci.c snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL); CM_REG_MISC_CTRL 1210 sound/pci/cmipci.c snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL); CM_REG_MISC_CTRL 1223 sound/pci/cmipci.c snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_AC3EN2); CM_REG_MISC_CTRL 1228 sound/pci/cmipci.c snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL); CM_REG_MISC_CTRL 1231 sound/pci/cmipci.c snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL); CM_REG_MISC_CTRL 1235 sound/pci/cmipci.c snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL); CM_REG_MISC_CTRL 1263 sound/pci/cmipci.c snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_SPDIF48K | CM_SPDF_AC97); CM_REG_MISC_CTRL 1265 sound/pci/cmipci.c snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPDIF48K | CM_SPDF_AC97); CM_REG_MISC_CTRL 1410 sound/pci/cmipci.c snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL); CM_REG_MISC_CTRL 1412 sound/pci/cmipci.c snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL); CM_REG_MISC_CTRL 1425 sound/pci/cmipci.c snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_SPD32SEL); CM_REG_MISC_CTRL 1623 sound/pci/cmipci.c snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_ENDBDAC); CM_REG_MISC_CTRL 1646 sound/pci/cmipci.c snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_ENDBDAC); CM_REG_MISC_CTRL 2427 sound/pci/cmipci.c DEFINE_BIT_SWITCH_ARG(spdif_in_sel2, CM_REG_MISC_CTRL, CM_SPDIF_SELECT2, 0, 0); CM_REG_MISC_CTRL 2433 sound/pci/cmipci.c DEFINE_SWITCH_ARG(spdo_5v, CM_REG_MISC_CTRL, CM_SPDO5V, 0, 0, 0); /* inverse: 0 = 5V */ CM_REG_MISC_CTRL 2441 sound/pci/cmipci.c DEFINE_SWITCH_ARG(exchange_dac, CM_REG_MISC_CTRL, CM_XCHGDAC, 0, 0, 0); /* reversed */ CM_REG_MISC_CTRL 2443 sound/pci/cmipci.c DEFINE_SWITCH_ARG(exchange_dac, CM_REG_MISC_CTRL, CM_XCHGDAC, CM_XCHGDAC, 0, 0); CM_REG_MISC_CTRL 2445 sound/pci/cmipci.c DEFINE_BIT_SWITCH_ARG(fourch, CM_REG_MISC_CTRL, CM_N4SPK3D, 0, 0); CM_REG_MISC_CTRL 2449 sound/pci/cmipci.c DEFINE_SWITCH_ARG(modem, CM_REG_MISC_CTRL, CM_FLINKON|CM_FLINKOFF, CM_FLINKON, 0, 0); CM_REG_MISC_CTRL 2928 sound/pci/cmipci.c snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_FM_EN); CM_REG_MISC_CTRL 2987 sound/pci/cmipci.c snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_FM_EN); CM_REG_MISC_CTRL 3004 sound/pci/cmipci.c snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_FM_EN); CM_REG_MISC_CTRL 3092 sound/pci/cmipci.c snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_RESET); CM_REG_MISC_CTRL 3093 sound/pci/cmipci.c snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_RESET); CM_REG_MISC_CTRL 3101 sound/pci/cmipci.c snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_ENDBDAC|CM_N4SPK3D); CM_REG_MISC_CTRL 3103 sound/pci/cmipci.c snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC); CM_REG_MISC_CTRL 3105 sound/pci/cmipci.c snd_cmipci_clear_bit(cm, CM_REG_MISC_CTRL, CM_XCHGDAC); CM_REG_MISC_CTRL 3119 sound/pci/cmipci.c snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_TXVX); CM_REG_MISC_CTRL 3243 sound/pci/cmipci.c snd_cmipci_set_bit(cm, CM_REG_MISC_CTRL, CM_SPDIF48K|CM_SPDF_AC97); CM_REG_MISC_CTRL 3321 sound/pci/cmipci.c CM_REG_FUNCTRL1, CM_REG_CHFORMAT, CM_REG_LEGACY_CTRL, CM_REG_MISC_CTRL,