MSR_IA32_MISC_ENABLE  206 arch/x86/kernel/cpu/cpufreq/e_powersaver.c 	rdmsrl(MSR_IA32_MISC_ENABLE, val);
MSR_IA32_MISC_ENABLE  209 arch/x86/kernel/cpu/cpufreq/e_powersaver.c 		wrmsrl(MSR_IA32_MISC_ENABLE, val);
MSR_IA32_MISC_ENABLE  211 arch/x86/kernel/cpu/cpufreq/e_powersaver.c 		rdmsrl(MSR_IA32_MISC_ENABLE, val);
MSR_IA32_MISC_ENABLE  391 arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c 	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
MSR_IA32_MISC_ENABLE  396 arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c 		wrmsr(MSR_IA32_MISC_ENABLE, l, h);
MSR_IA32_MISC_ENABLE  399 arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c 		rdmsr(MSR_IA32_MISC_ENABLE, l, h);
MSR_IA32_MISC_ENABLE  115 arch/x86/kernel/cpu/intel.c 		rdmsr(MSR_IA32_MISC_ENABLE, lo, hi);
MSR_IA32_MISC_ENABLE  120 arch/x86/kernel/cpu/intel.c 			wrmsr (MSR_IA32_MISC_ENABLE, lo, hi);
MSR_IA32_MISC_ENABLE  257 arch/x86/kernel/cpu/intel.c 		rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
MSR_IA32_MISC_ENABLE   49 arch/x86/kernel/cpu/mcheck/mce_intel_64.c 	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
MSR_IA32_MISC_ENABLE   74 arch/x86/kernel/cpu/mcheck/mce_intel_64.c 	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
MSR_IA32_MISC_ENABLE   75 arch/x86/kernel/cpu/mcheck/mce_intel_64.c 	wrmsr(MSR_IA32_MISC_ENABLE, l | (1 << 3), h);
MSR_IA32_MISC_ENABLE   86 arch/x86/kernel/cpu/mcheck/p4.c 	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
MSR_IA32_MISC_ENABLE  113 arch/x86/kernel/cpu/mcheck/p4.c 	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
MSR_IA32_MISC_ENABLE  114 arch/x86/kernel/cpu/mcheck/p4.c 	wrmsr(MSR_IA32_MISC_ENABLE, l | (1<<3), h);
MSR_IA32_MISC_ENABLE  481 arch/x86/kernel/cpu/perfctr-watchdog.c 	rdmsr(MSR_IA32_MISC_ENABLE, misc_enable, dummy);
MSR_IA32_MISC_ENABLE  447 arch/x86/kvm/x86.c 	MSR_IA32_MISC_ENABLE,
MSR_IA32_MISC_ENABLE  673 arch/x86/kvm/x86.c 	case MSR_IA32_MISC_ENABLE:
MSR_IA32_MISC_ENABLE  770 arch/x86/kvm/x86.c 	case MSR_IA32_MISC_ENABLE:
MSR_IA32_MISC_ENABLE  559 arch/x86/oprofile/op_model_p4.c 	rdmsr(MSR_IA32_MISC_ENABLE, low, high);