writel_be 70 sound/pci/mixart/mixart_core.c writel_be(tailptr, MIXART_MEM(mgr, MSG_OUTBOUND_POST_TAIL)); writel_be 124 sound/pci/mixart/mixart_core.c writel_be(msg_frame_address, MIXART_MEM(mgr, headptr)); writel_be 131 sound/pci/mixart/mixart_core.c writel_be(headptr, MIXART_MEM(mgr, MSG_OUTBOUND_FREE_HEAD)); writel_be 180 sound/pci/mixart/mixart_core.c writel_be(tailptr, MIXART_MEM(mgr, MSG_INBOUND_FREE_TAIL)); writel_be 185 sound/pci/mixart/mixart_core.c writel_be( msg->size + MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address) ); /* size of descriptor + request */ writel_be 186 sound/pci/mixart/mixart_core.c writel_be( msg->message_id , MIXART_MEM(mgr, msg_frame_address + 4) ); /* dwMessageID */ writel_be 187 sound/pci/mixart/mixart_core.c writel_be( msg->uid.object_id, MIXART_MEM(mgr, msg_frame_address + 8) ); /* uidDest */ writel_be 188 sound/pci/mixart/mixart_core.c writel_be( msg->uid.desc, MIXART_MEM(mgr, msg_frame_address + 12) ); /* */ writel_be 189 sound/pci/mixart/mixart_core.c writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 16) ); /* SizeHeader */ writel_be 190 sound/pci/mixart/mixart_core.c writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 20) ); /* OffsetDLL_T16 */ writel_be 191 sound/pci/mixart/mixart_core.c writel_be( msg->size, MIXART_MEM(mgr, msg_frame_address + 24) ); /* SizeDLL_T16 */ writel_be 192 sound/pci/mixart/mixart_core.c writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 28) ); /* OffsetDLL_DRV */ writel_be 193 sound/pci/mixart/mixart_core.c writel_be( 0, MIXART_MEM(mgr, msg_frame_address + 32) ); /* SizeDLL_DRV */ writel_be 194 sound/pci/mixart/mixart_core.c writel_be( MSG_DESCRIPTOR_SIZE + max_answersize, MIXART_MEM(mgr, msg_frame_address + 36) ); /* dwExpectedAnswerSize */ writel_be 198 sound/pci/mixart/mixart_core.c writel_be( *(u32*)(msg->data + i), MIXART_MEM(mgr, MSG_HEADER_SIZE + msg_frame_address + i) ); writel_be 225 sound/pci/mixart/mixart_core.c writel_be(msg_frame_address, MIXART_MEM(mgr, headptr)); writel_be 232 sound/pci/mixart/mixart_core.c writel_be(headptr, MIXART_MEM(mgr, MSG_INBOUND_POST_HEAD)); writel_be 596 sound/pci/mixart/mixart_core.c writel_be( 1, MIXART_REG(mgr, MIXART_BA1_BRUTAL_RESET_OFFSET) ); writel_be 374 sound/pci/mixart/mixart_hwdep.c writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET )); writel_be 377 sound/pci/mixart/mixart_hwdep.c writel_be( MIXART_MOTHERBOARD_XLX_BASE_ADDRESS, MIXART_MEM( mgr,MIXART_PSEUDOREG_MXLX_BASE_ADDR_OFFSET )); writel_be 379 sound/pci/mixart/mixart_hwdep.c writel_be( dsp->size, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_SIZE_OFFSET )); writel_be 385 sound/pci/mixart/mixart_hwdep.c writel_be( 2, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET )); writel_be 411 sound/pci/mixart/mixart_hwdep.c writel_be( 0, MIXART_MEM( mgr, MIXART_PSEUDOREG_BOARDNUMBER ) ); /* set miXart boardnumber to 0 */ writel_be 412 sound/pci/mixart/mixart_hwdep.c writel_be( 0, MIXART_MEM( mgr, MIXART_FLOWTABLE_PTR ) ); /* reset pointer to flow table on miXart */ writel_be 415 sound/pci/mixart/mixart_hwdep.c writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET )); writel_be 422 sound/pci/mixart/mixart_hwdep.c writel_be( 2, MIXART_MEM( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET )); writel_be 432 sound/pci/mixart/mixart_hwdep.c writel_be( (u32)mgr->flowinfo.addr, MIXART_MEM( mgr, MIXART_FLOWTABLE_PTR ) ); /* give pointer of flow table to miXart */ writel_be 475 sound/pci/mixart/mixart_hwdep.c writel_be( dsp->size, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_SIZE_OFFSET )); writel_be 478 sound/pci/mixart/mixart_hwdep.c writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET )); writel_be 496 sound/pci/mixart/mixart_hwdep.c writel_be( 4, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET ));