apic_get_reg       97 arch/x86/kvm/lapic.c 	return apic_get_reg(apic, APIC_SPIV) & APIC_SPIV_APIC_ENABLED;
apic_get_reg      114 arch/x86/kvm/lapic.c 	return (apic_get_reg(apic, APIC_ID) >> 24) & 0xff;
apic_get_reg      119 arch/x86/kvm/lapic.c 	return !(apic_get_reg(apic, lvt_type) & APIC_LVT_MASKED);
apic_get_reg      124 arch/x86/kvm/lapic.c 	return apic_get_reg(apic, lvt_type) & APIC_VECTOR_MASK;
apic_get_reg      129 arch/x86/kvm/lapic.c 	return apic_get_reg(apic, APIC_LVTT) & APIC_LVT_TIMER_PERIODIC;
apic_get_reg      218 arch/x86/kvm/lapic.c 	tpr = apic_get_reg(apic, APIC_TASKPRI);
apic_get_reg      249 arch/x86/kvm/lapic.c 	logical_id = GET_APIC_LOGICAL_ID(apic_get_reg(apic, APIC_LDR));
apic_get_reg      251 arch/x86/kvm/lapic.c 	switch (apic_get_reg(apic, APIC_DFR)) {
apic_get_reg      263 arch/x86/kvm/lapic.c 		       apic->vcpu->vcpu_id, apic_get_reg(apic, APIC_DFR));
apic_get_reg      458 arch/x86/kvm/lapic.c 	u32 icr_low = apic_get_reg(apic, APIC_ICR);
apic_get_reg      459 arch/x86/kvm/lapic.c 	u32 icr_high = apic_get_reg(apic, APIC_ICR2);
apic_get_reg      512 arch/x86/kvm/lapic.c 	tmcct = apic_get_reg(apic, APIC_TMICT);
apic_get_reg      596 arch/x86/kvm/lapic.c 		val = apic_get_reg(apic, offset);
apic_get_reg      635 arch/x86/kvm/lapic.c 	tdcr = apic_get_reg(apic, APIC_TDCR);
apic_get_reg      650 arch/x86/kvm/lapic.c 	apic->timer.period = apic_get_reg(apic, APIC_TMICT) *
apic_get_reg      666 arch/x86/kvm/lapic.c 			   apic_get_reg(apic, APIC_TMICT),
apic_get_reg      732 arch/x86/kvm/lapic.c 				lvt_val = apic_get_reg(apic,
apic_get_reg      829 arch/x86/kvm/lapic.c 		     | (apic_get_reg(apic, APIC_TASKPRI) & 4));
apic_get_reg      840 arch/x86/kvm/lapic.c 	tpr = (u64) apic_get_reg(apic, APIC_TASKPRI);
apic_get_reg     1049 arch/x86/kvm/lapic.c 	    ((highest_irr & 0xF0) <= apic_get_reg(apic, APIC_PROCPRI)))
apic_get_reg     1056 arch/x86/kvm/lapic.c 	u32 lvt0 = apic_get_reg(vcpu->arch.apic, APIC_LVT0);
apic_get_reg     1156 arch/x86/kvm/lapic.c 	tpr = apic_get_reg(apic, APIC_TASKPRI) & 0xff;