__SYSREG 20 include/asm-mn10300/busctl-regs.h #define BCCR __SYSREG(0xc0002000, u32) /* bus controller control reg */
__SYSREG 50 include/asm-mn10300/busctl-regs.h #define BCBERR __SYSREG(0xc0002010, u32) /* bus error source reg */
__SYSREG 76 include/asm-mn10300/busctl-regs.h #define SBBASE(X) __SYSREG(0xd8c00100 + (X) * 0x10, u32) /* SBC base addr regs */
__SYSREG 81 include/asm-mn10300/busctl-regs.h #define SBCNTRL0(X) __SYSREG(0xd8c00200 + (X) * 0x10, u32) /* SBC bank ctrl0 regs */
__SYSREG 89 include/asm-mn10300/busctl-regs.h #define SBCNTRL1(X) __SYSREG(0xd8c00204 + (X) * 0x10, u32) /* SBC bank ctrl1 regs */
__SYSREG 97 include/asm-mn10300/busctl-regs.h #define SBCNTRL2(X) __SYSREG(0xd8c00208 + (X) * 0x10, u32) /* SBC bank ctrl2 regs */
__SYSREG 119 include/asm-mn10300/busctl-regs.h #define SDBASE(X) __SYSREG(0xda000008 + (X) * 0x4, u32) /* MBC base addr regs */
__SYSREG 125 include/asm-mn10300/busctl-regs.h #define SDRAMBUS __SYSREG(0xda000000, u32) /* bus mode control reg */
__SYSREG 144 include/asm-mn10300/busctl-regs.h #define SDREFCNT __SYSREG(0xda000004, u32) /* refresh period reg */
__SYSREG 147 include/asm-mn10300/busctl-regs.h #define SDSHDW __SYSREG(0xda000010, u32) /* test reg */
__SYSREG 30 include/asm-mn10300/cache.h __SYSREG(0xc8400000 + (WAY) * L1_CACHE_WAYDISP + \
__SYSREG 34 include/asm-mn10300/cache.h __SYSREG(0xc8400000 + 0 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
__SYSREG 36 include/asm-mn10300/cache.h __SYSREG(0xc8400000 + 1 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
__SYSREG 38 include/asm-mn10300/cache.h __SYSREG(0xc8400000 + 2 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
__SYSREG 40 include/asm-mn10300/cache.h __SYSREG(0xc8400000 + 3 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32)
__SYSREG 44 include/asm-mn10300/cache.h __SYSREG(0xc8000000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10 + (OFF) * 4, u32)
__SYSREG 46 include/asm-mn10300/cache.h __SYSREG(0xc8100000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10, u32)
__SYSREG 50 include/asm-mn10300/cache.h __SYSREG(0xc8200000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10 + (OFF) * 4, u32)
__SYSREG 52 include/asm-mn10300/cache.h __SYSREG(0xc8300000 + (WAY) * L1_CACHE_WAYDISP + (ENTRY) * 0x10, u32)
__SYSREG 87 include/asm-mn10300/cpu-regs.h #define CPUP __SYSREG(0xc0000020, u16) /* CPU pipeline register */
__SYSREG 94 include/asm-mn10300/cpu-regs.h #define CPUM __SYSREG(0xc0000040, u16) /* CPU mode register */
__SYSREG 119 include/asm-mn10300/cpu-regs.h #define DCR __SYSREG(0xc0000030, u16) /* Debug control register */
__SYSREG 122 include/asm-mn10300/cpu-regs.h #define IVAR0 __SYSREG(0xc0000000, u16) /* interrupt vector 0 */
__SYSREG 123 include/asm-mn10300/cpu-regs.h #define IVAR1 __SYSREG(0xc0000004, u16) /* interrupt vector 1 */
__SYSREG 124 include/asm-mn10300/cpu-regs.h #define IVAR2 __SYSREG(0xc0000008, u16) /* interrupt vector 2 */
__SYSREG 125 include/asm-mn10300/cpu-regs.h #define IVAR3 __SYSREG(0xc000000c, u16) /* interrupt vector 3 */
__SYSREG 126 include/asm-mn10300/cpu-regs.h #define IVAR4 __SYSREG(0xc0000010, u16) /* interrupt vector 4 */
__SYSREG 127 include/asm-mn10300/cpu-regs.h #define IVAR5 __SYSREG(0xc0000014, u16) /* interrupt vector 5 */
__SYSREG 128 include/asm-mn10300/cpu-regs.h #define IVAR6 __SYSREG(0xc0000018, u16) /* interrupt vector 6 */
__SYSREG 130 include/asm-mn10300/cpu-regs.h #define TBR __SYSREG(0xc0000024, u32) /* Trap table base */
__SYSREG 134 include/asm-mn10300/cpu-regs.h #define DEAR __SYSREG(0xc0000038, u32) /* Data access exception address */
__SYSREG 136 include/asm-mn10300/cpu-regs.h #define sISR __SYSREG(0xc0000044, u32) /* Supervisor interrupt status */
__SYSREG 169 include/asm-mn10300/cpu-regs.h #define CHCTR __SYSREG(0xc0000070, u16) /* cache control */
__SYSREG 184 include/asm-mn10300/cpu-regs.h #define MMUCTR __SYSREG(0xc0000090, u32) /* MMU control register */
__SYSREG 207 include/asm-mn10300/cpu-regs.h #define PIDR __SYSREG(0xc0000094, u16) /* PID register */
__SYSREG 210 include/asm-mn10300/cpu-regs.h #define PTBR __SYSREG(0xc0000098, unsigned long) /* Page table base register */
__SYSREG 212 include/asm-mn10300/cpu-regs.h #define IPTEL __SYSREG(0xc00000a0, u32) /* instruction TLB entry */
__SYSREG 213 include/asm-mn10300/cpu-regs.h #define DPTEL __SYSREG(0xc00000b0, u32) /* data TLB entry */
__SYSREG 242 include/asm-mn10300/cpu-regs.h #define IPTEU __SYSREG(0xc00000a4, u32) /* instruction TLB virtual addr */
__SYSREG 243 include/asm-mn10300/cpu-regs.h #define DPTEU __SYSREG(0xc00000b4, u32) /* data TLB virtual addr */
__SYSREG 247 include/asm-mn10300/cpu-regs.h #define IPTEL2 __SYSREG(0xc00000a8, u32) /* instruction TLB entry */
__SYSREG 248 include/asm-mn10300/cpu-regs.h #define DPTEL2 __SYSREG(0xc00000b8, u32) /* data TLB entry */
__SYSREG 19 include/asm-mn10300/dmactl-regs.h #define DMxCTR(N) __SYSREG(0xd2000000 + ((N) * 0x100), u32) /* control reg */
__SYSREG 66 include/asm-mn10300/dmactl-regs.h #define DMxSRC(N) __SYSREG(0xd2000004 + ((N) * 0x100), u32) /* control reg */
__SYSREG 68 include/asm-mn10300/dmactl-regs.h #define DMxDST(N) __SYSREG(0xd2000008 + ((N) * 0x100), u32) /* src addr reg */
__SYSREG 70 include/asm-mn10300/dmactl-regs.h #define DMxSIZ(N) __SYSREG(0xd200000c + ((N) * 0x100), u32) /* dest addr reg */
__SYSREG 73 include/asm-mn10300/dmactl-regs.h #define DMxCYC(N) __SYSREG(0xd2000010 + ((N) * 0x100), u32) /* intermittent
__SYSREG 19 include/asm-mn10300/intctl-regs.h #define GxICR(X) __SYSREG(0xd4000000 + (X) * 4, u16) /* group irq ctrl regs */
__SYSREG 21 include/asm-mn10300/intctl-regs.h #define IAGR __SYSREG(0xd4000100, u16) /* intr acceptance group reg */
__SYSREG 26 include/asm-mn10300/intctl-regs.h #define EXTMD __SYSREG(0xd4000200, u16) /* external pin intr spec reg */
__SYSREG 20 include/asm-mn10300/pio-regs.h #define P0MD __SYSREG(0xdb000000, u16) /* mode reg */
__SYSREG 57 include/asm-mn10300/pio-regs.h #define P0IN __SYSREG(0xdb000004, u8) /* in reg */
__SYSREG 58 include/asm-mn10300/pio-regs.h #define P0OUT __SYSREG(0xdb000008, u8) /* out reg */
__SYSREG 60 include/asm-mn10300/pio-regs.h #define P0TMIO __SYSREG(0xdb00000c, u8) /* TM pin I/O control reg */
__SYSREG 79 include/asm-mn10300/pio-regs.h #define P1MD __SYSREG(0xdb000100, u16) /* mode reg */
__SYSREG 106 include/asm-mn10300/pio-regs.h #define P1IN __SYSREG(0xdb000104, u8) /* in reg */
__SYSREG 107 include/asm-mn10300/pio-regs.h #define P1OUT __SYSREG(0xdb000108, u8) /* out reg */
__SYSREG 108 include/asm-mn10300/pio-regs.h #define P1TMIO __SYSREG(0xdb00010c, u8) /* TM pin I/O control reg */
__SYSREG 121 include/asm-mn10300/pio-regs.h #define P2MD __SYSREG(0xdb000200, u16) /* mode reg */
__SYSREG 142 include/asm-mn10300/pio-regs.h #define P2IN __SYSREG(0xdb000204, u8) /* in reg */
__SYSREG 143 include/asm-mn10300/pio-regs.h #define P2OUT __SYSREG(0xdb000208, u8) /* out reg */
__SYSREG 144 include/asm-mn10300/pio-regs.h #define P2TMIO __SYSREG(0xdb00020c, u8) /* TM pin I/O control reg */
__SYSREG 147 include/asm-mn10300/pio-regs.h #define P3MD __SYSREG(0xdb000300, u16) /* mode reg */
__SYSREG 169 include/asm-mn10300/pio-regs.h #define P3IN __SYSREG(0xdb000304, u8) /* in reg */
__SYSREG 170 include/asm-mn10300/pio-regs.h #define P3OUT __SYSREG(0xdb000308, u8) /* out reg */
__SYSREG 173 include/asm-mn10300/pio-regs.h #define P4MD __SYSREG(0xdb000400, u16) /* mode reg */
__SYSREG 207 include/asm-mn10300/pio-regs.h #define P4IN __SYSREG(0xdb000404, u8) /* in reg */
__SYSREG 208 include/asm-mn10300/pio-regs.h #define P4OUT __SYSREG(0xdb000408, u8) /* out reg */
__SYSREG 211 include/asm-mn10300/pio-regs.h #define P5MD __SYSREG(0xdb000500, u16) /* mode reg */
__SYSREG 227 include/asm-mn10300/pio-regs.h #define P5IN __SYSREG(0xdb000504, u8) /* in reg */
__SYSREG 228 include/asm-mn10300/pio-regs.h #define P5OUT __SYSREG(0xdb000508, u8) /* out reg */
__SYSREG 29 include/asm-mn10300/reset-regs.h #define WDCTR __SYSREG(0xc0001002, u8) /* watchdog timer control reg */
__SYSREG 39 include/asm-mn10300/reset-regs.h #define RSTCTR __SYSREG(0xc0001004, u8) /* reset control reg */
__SYSREG 18 include/asm-mn10300/rtc-regs.h #define RTSCR __SYSREG(0xd8600000, u8) /* RTC seconds count reg */
__SYSREG 19 include/asm-mn10300/rtc-regs.h #define RTSAR __SYSREG(0xd8600001, u8) /* RTC seconds alarm reg */
__SYSREG 20 include/asm-mn10300/rtc-regs.h #define RTMCR __SYSREG(0xd8600002, u8) /* RTC minutes count reg */
__SYSREG 21 include/asm-mn10300/rtc-regs.h #define RTMAR __SYSREG(0xd8600003, u8) /* RTC minutes alarm reg */
__SYSREG 22 include/asm-mn10300/rtc-regs.h #define RTHCR __SYSREG(0xd8600004, u8) /* RTC hours count reg */
__SYSREG 23 include/asm-mn10300/rtc-regs.h #define RTHAR __SYSREG(0xd8600005, u8) /* RTC hours alarm reg */
__SYSREG 24 include/asm-mn10300/rtc-regs.h #define RTDWCR __SYSREG(0xd8600006, u8) /* RTC day of the week count reg */
__SYSREG 25 include/asm-mn10300/rtc-regs.h #define RTDMCR __SYSREG(0xd8600007, u8) /* RTC days count reg */
__SYSREG 26 include/asm-mn10300/rtc-regs.h #define RTMTCR __SYSREG(0xd8600008, u8) /* RTC months count reg */
__SYSREG 27 include/asm-mn10300/rtc-regs.h #define RTYCR __SYSREG(0xd8600009, u8) /* RTC years count reg */
__SYSREG 29 include/asm-mn10300/rtc-regs.h #define RTCRA __SYSREG(0xd860000a, u8)/* RTC control reg A */
__SYSREG 50 include/asm-mn10300/rtc-regs.h #define RTCRB __SYSREG(0xd860000b, u8) /* RTC control reg B */
__SYSREG 63 include/asm-mn10300/rtc-regs.h #define RTSRC __SYSREG(0xd860000c, u8) /* RTC status reg C */
__SYSREG 78 include/asm-mn10300/rtc-regs.h #define CMOS_READ(addr) __SYSREG(0xd8600000 + (addr), u8)
__SYSREG 80 include/asm-mn10300/rtc-regs.h do { __SYSREG(0xd8600000 + (addr), u8) = val; } while (0)
__SYSREG 21 include/asm-mn10300/serial-regs.h #define SC0CTR __SYSREG(0xd4002000, u16) /* control reg */
__SYSREG 61 include/asm-mn10300/serial-regs.h #define SC0ICR __SYSREG(0xd4002004, u8) /* interrupt control reg */
__SYSREG 68 include/asm-mn10300/serial-regs.h #define SC0TXB __SYSREG(0xd4002008, u8) /* transmit buffer reg */
__SYSREG 69 include/asm-mn10300/serial-regs.h #define SC0RXB __SYSREG(0xd4002009, u8) /* receive buffer reg */
__SYSREG 71 include/asm-mn10300/serial-regs.h #define SC0STR __SYSREG(0xd400200c, u16) /* status reg */
__SYSREG 89 include/asm-mn10300/serial-regs.h #define SC1CTR __SYSREG(0xd4002010, u16) /* serial port 1 control */
__SYSREG 90 include/asm-mn10300/serial-regs.h #define SC1ICR __SYSREG(0xd4002014, u8) /* interrupt control reg */
__SYSREG 91 include/asm-mn10300/serial-regs.h #define SC1TXB __SYSREG(0xd4002018, u8) /* transmit buffer reg */
__SYSREG 92 include/asm-mn10300/serial-regs.h #define SC1RXB __SYSREG(0xd4002019, u8) /* receive buffer reg */
__SYSREG 93 include/asm-mn10300/serial-regs.h #define SC1STR __SYSREG(0xd400201c, u16) /* status reg */
__SYSREG 102 include/asm-mn10300/serial-regs.h #define SC2CTR __SYSREG(0xd4002020, u16) /* control reg */
__SYSREG 131 include/asm-mn10300/serial-regs.h #define SC2ICR __SYSREG(0xd4002024, u8) /* interrupt control reg */
__SYSREG 137 include/asm-mn10300/serial-regs.h #define SC2TXB __SYSREG(0xd4002018, u8) /* transmit buffer reg */
__SYSREG 138 include/asm-mn10300/serial-regs.h #define SC2RXB __SYSREG(0xd4002019, u8) /* receive buffer reg */
__SYSREG 139 include/asm-mn10300/serial-regs.h #define SC2STR __SYSREG(0xd400201c, u8) /* status reg */
__SYSREG 149 include/asm-mn10300/serial-regs.h #define SC2TIM __SYSREG(0xd400202d, u8) /* status reg */
__SYSREG 21 include/asm-mn10300/timer-regs.h #define TMPSCNT __SYSREG(0xd4003071, u8) /* timer prescaler control */
__SYSREG 26 include/asm-mn10300/timer-regs.h #define TM0MD __SYSREG(0xd4003000, u8) /* timer 0 mode register */
__SYSREG 38 include/asm-mn10300/timer-regs.h #define TM1MD __SYSREG(0xd4003001, u8) /* timer 1 mode register */
__SYSREG 50 include/asm-mn10300/timer-regs.h #define TM2MD __SYSREG(0xd4003002, u8) /* timer 2 mode register */
__SYSREG 62 include/asm-mn10300/timer-regs.h #define TM3MD __SYSREG(0xd4003003, u8) /* timer 3 mode register */
__SYSREG 75 include/asm-mn10300/timer-regs.h #define TM01MD __SYSREG(0xd4003000, u16) /* timer 0:1 mode register */
__SYSREG 77 include/asm-mn10300/timer-regs.h #define TM0BR __SYSREG(0xd4003010, u8) /* timer 0 base register */
__SYSREG 78 include/asm-mn10300/timer-regs.h #define TM1BR __SYSREG(0xd4003011, u8) /* timer 1 base register */
__SYSREG 79 include/asm-mn10300/timer-regs.h #define TM2BR __SYSREG(0xd4003012, u8) /* timer 2 base register */
__SYSREG 80 include/asm-mn10300/timer-regs.h #define TM3BR __SYSREG(0xd4003013, u8) /* timer 3 base register */
__SYSREG 81 include/asm-mn10300/timer-regs.h #define TM01BR __SYSREG(0xd4003010, u16) /* timer 0:1 base register */
__SYSREG 100 include/asm-mn10300/timer-regs.h #define TM4MD __SYSREG(0xd4003080, u8) /* timer 4 mode register */
__SYSREG 112 include/asm-mn10300/timer-regs.h #define TM5MD __SYSREG(0xd4003082, u8) /* timer 5 mode register */
__SYSREG 125 include/asm-mn10300/timer-regs.h #define TM7MD __SYSREG(0xd4003086, u8) /* timer 7 mode register */
__SYSREG 137 include/asm-mn10300/timer-regs.h #define TM8MD __SYSREG(0xd4003088, u8) /* timer 8 mode register */
__SYSREG 150 include/asm-mn10300/timer-regs.h #define TM9MD __SYSREG(0xd400308a, u8) /* timer 9 mode register */
__SYSREG 163 include/asm-mn10300/timer-regs.h #define TM10MD __SYSREG(0xd400308c, u8) /* timer 10 mode register */
__SYSREG 176 include/asm-mn10300/timer-regs.h #define TM11MD __SYSREG(0xd400308e, u8) /* timer 11 mode register */
__SYSREG 189 include/asm-mn10300/timer-regs.h #define TM4BR __SYSREG(0xd4003090, u16) /* timer 4 base register */
__SYSREG 190 include/asm-mn10300/timer-regs.h #define TM5BR __SYSREG(0xd4003092, u16) /* timer 5 base register */
__SYSREG 191 include/asm-mn10300/timer-regs.h #define TM7BR __SYSREG(0xd4003096, u16) /* timer 7 base register */
__SYSREG 192 include/asm-mn10300/timer-regs.h #define TM8BR __SYSREG(0xd4003098, u16) /* timer 8 base register */
__SYSREG 193 include/asm-mn10300/timer-regs.h #define TM9BR __SYSREG(0xd400309a, u16) /* timer 9 base register */
__SYSREG 194 include/asm-mn10300/timer-regs.h #define TM10BR __SYSREG(0xd400309c, u16) /* timer 10 base register */
__SYSREG 195 include/asm-mn10300/timer-regs.h #define TM11BR __SYSREG(0xd400309e, u16) /* timer 11 base register */
__SYSREG 196 include/asm-mn10300/timer-regs.h #define TM45BR __SYSREG(0xd4003090, u32) /* timer 4:5 base register */
__SYSREG 198 include/asm-mn10300/timer-regs.h #define TM4BC __SYSREG(0xd40030a0, u16) /* timer 4 binary counter */
__SYSREG 199 include/asm-mn10300/timer-regs.h #define TM5BC __SYSREG(0xd40030a2, u16) /* timer 5 binary counter */
__SYSREG 200 include/asm-mn10300/timer-regs.h #define TM45BC __SYSREG(0xd40030a0, u32) /* timer 4:5 binary counter */
__SYSREG 202 include/asm-mn10300/timer-regs.h #define TM7BC __SYSREG(0xd40030a6, u16) /* timer 7 binary counter */
__SYSREG 203 include/asm-mn10300/timer-regs.h #define TM8BC __SYSREG(0xd40030a8, u16) /* timer 8 binary counter */
__SYSREG 204 include/asm-mn10300/timer-regs.h #define TM9BC __SYSREG(0xd40030aa, u16) /* timer 9 binary counter */
__SYSREG 205 include/asm-mn10300/timer-regs.h #define TM10BC __SYSREG(0xd40030ac, u16) /* timer 10 binary counter */
__SYSREG 206 include/asm-mn10300/timer-regs.h #define TM11BC __SYSREG(0xd40030ae, u16) /* timer 11 binary counter */
__SYSREG 225 include/asm-mn10300/timer-regs.h #define TM6MD __SYSREG(0xd4003084, u16) /* timer6 mode register */
__SYSREG 246 include/asm-mn10300/timer-regs.h #define TM6MDA __SYSREG(0xd40030b4, u8) /* timer6 cmp/cap A mode reg */
__SYSREG 263 include/asm-mn10300/timer-regs.h #define TM6MDB __SYSREG(0xd40030b5, u8) /* timer6 cmp/cap B mode reg */
__SYSREG 279 include/asm-mn10300/timer-regs.h #define TM6CA __SYSREG(0xd40030c4, u16) /* timer6 cmp/capture reg A */
__SYSREG 280 include/asm-mn10300/timer-regs.h #define TM6CB __SYSREG(0xd40030d4, u16) /* timer6 cmp/capture reg B */
__SYSREG 281 include/asm-mn10300/timer-regs.h #define TM6BC __SYSREG(0xd40030a4, u16) /* timer6 binary counter */
__SYSREG 19 include/asm-mn10300/unit-asb2303/leds.h #define ASB2303_GPIO0DEF __SYSREG(0xDB000000, u32)
__SYSREG 20 include/asm-mn10300/unit-asb2303/leds.h #define ASB2303_7SEGLEDS __SYSREG(0xDB000008, u32)
__SYSREG 60 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8)
__SYSREG 61 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
__SYSREG 62 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
__SYSREG 63 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
__SYSREG 64 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
__SYSREG 65 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
__SYSREG 66 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
__SYSREG 67 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
__SYSREG 68 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
__SYSREG 69 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
__SYSREG 70 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
__SYSREG 71 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8)
__SYSREG 75 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_RX * 4, u8)
__SYSREG 76 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_TX * 4, u8)
__SYSREG 77 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_DLL * 4, u8)
__SYSREG 78 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_DLM * 4, u8)
__SYSREG 79 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_IER * 4, u8)
__SYSREG 80 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_IIR * 4, u8)
__SYSREG 81 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_FCR * 4, u8)
__SYSREG 82 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LCR * 4, u8)
__SYSREG 83 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_MCR * 4, u8)
__SYSREG 84 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LSR * 4, u8)
__SYSREG 85 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_MSR * 4, u8)
__SYSREG 86 include/asm-mn10300/unit-asb2303/serial.h #define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_SCR * 4, u8)
__SYSREG 19 include/asm-mn10300/unit-asb2305/leds.h #define ASB2305_7SEGLEDS __SYSREG(0xA6F90000, u32)
__SYSREG 19 include/asm-mn10300/unit-asb2305/serial.h #define ASB2305_DEBUG_MCR __SYSREG(0xA6FB0000 + UART_MCR * 2, u8)
__SYSREG 51 include/asm-mn10300/unit-asb2305/serial.h #define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8)
__SYSREG 52 include/asm-mn10300/unit-asb2305/serial.h #define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
__SYSREG 53 include/asm-mn10300/unit-asb2305/serial.h #define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
__SYSREG 54 include/asm-mn10300/unit-asb2305/serial.h #define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
__SYSREG 55 include/asm-mn10300/unit-asb2305/serial.h #define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
__SYSREG 56 include/asm-mn10300/unit-asb2305/serial.h #define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
__SYSREG 57 include/asm-mn10300/unit-asb2305/serial.h #define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
__SYSREG 58 include/asm-mn10300/unit-asb2305/serial.h #define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
__SYSREG 59 include/asm-mn10300/unit-asb2305/serial.h #define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
__SYSREG 60 include/asm-mn10300/unit-asb2305/serial.h #define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
__SYSREG 61 include/asm-mn10300/unit-asb2305/serial.h #define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
__SYSREG 62 include/asm-mn10300/unit-asb2305/serial.h #define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8)
__SYSREG 71 include/asm-mn10300/unit-asb2305/serial.h #define TTYS0_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
__SYSREG 72 include/asm-mn10300/unit-asb2305/serial.h #define TTYS0_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
__SYSREG 73 include/asm-mn10300/unit-asb2305/serial.h #define TTYS0_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
__SYSREG 74 include/asm-mn10300/unit-asb2305/serial.h #define TTYS0_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)