XCHAL_ICACHE_SIZE   21 include/asm-xtensa/cache.h #define ICACHE_WAY_SIZE	(XCHAL_ICACHE_SIZE/XCHAL_ICACHE_WAYS)
XCHAL_ICACHE_SIZE   86 include/asm-xtensa/cacheasm.h 	__loop_cache_all \ar \at iiu XCHAL_ICACHE_SIZE XCHAL_ICACHE_LINEWIDTH