XCHAL_ICACHE_LINEWIDTH   23 include/asm-xtensa/cache.h #define ICACHE_WAY_SHIFT (XCHAL_ICACHE_SETWIDTH + XCHAL_ICACHE_LINEWIDTH)
XCHAL_ICACHE_LINEWIDTH   86 include/asm-xtensa/cacheasm.h 	__loop_cache_all \ar \at iiu XCHAL_ICACHE_SIZE XCHAL_ICACHE_LINEWIDTH
XCHAL_ICACHE_LINEWIDTH  116 include/asm-xtensa/cacheasm.h 			 XCHAL_ICACHE_LINEWIDTH
XCHAL_ICACHE_LINEWIDTH  145 include/asm-xtensa/cacheasm.h 	__loop_cache_range \ar \as \at ihi XCHAL_ICACHE_LINEWIDTH
XCHAL_ICACHE_LINEWIDTH  174 include/asm-xtensa/cacheasm.h 	__loop_cache_page \ar \as ihi XCHAL_ICACHE_LINEWIDTH