XCHAL_DCACHE_SIZE   20 include/asm-xtensa/cache.h #define DCACHE_WAY_SIZE	(XCHAL_DCACHE_SIZE/XCHAL_DCACHE_WAYS)
XCHAL_DCACHE_SIZE   76 include/asm-xtensa/cacheasm.h 	__loop_cache_all \ar \at diu XCHAL_DCACHE_SIZE XCHAL_DCACHE_LINEWIDTH
XCHAL_DCACHE_SIZE   93 include/asm-xtensa/cacheasm.h 	__loop_cache_all \ar \at diwbi XCHAL_DCACHE_SIZE XCHAL_DCACHE_LINEWIDTH
XCHAL_DCACHE_SIZE  100 include/asm-xtensa/cacheasm.h 	__loop_cache_all \ar \at diwb XCHAL_DCACHE_SIZE XCHAL_DCACHE_LINEWIDTH