SNDRV_GF1_GB_DRAM_DMA_CONTROL   32 sound/isa/gus/gus_dma.c 	snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL, 0x00);
SNDRV_GF1_GB_DRAM_DMA_CONTROL   33 sound/isa/gus/gus_dma.c 	snd_gf1_look8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL);
SNDRV_GF1_GB_DRAM_DMA_CONTROL   89 sound/isa/gus/gus_dma.c 	snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL, dma_cmd);
SNDRV_GF1_GB_DRAM_DMA_CONTROL  491 sound/isa/gus/gus_io.c 	printk(KERN_INFO " -G- GF1 DRAM DMA control         = 0x%x\n", snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL));
SNDRV_GF1_GB_DRAM_DMA_CONTROL   98 sound/isa/gus/gus_irq.c 		if (snd_gf1_i_look8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL) & 0x40) {