PIC_MASTER_CMD    103 arch/x86/kernel/i8259.c 		ret = inb(PIC_MASTER_CMD) & mask;
PIC_MASTER_CMD    132 arch/x86/kernel/i8259.c 		outb(0x0B, PIC_MASTER_CMD);	/* ISR register */
PIC_MASTER_CMD    133 arch/x86/kernel/i8259.c 		value = inb(PIC_MASTER_CMD) & irqmask;
PIC_MASTER_CMD    134 arch/x86/kernel/i8259.c 		outb(0x0A, PIC_MASTER_CMD);	/* back to the IRR register */
PIC_MASTER_CMD    181 arch/x86/kernel/i8259.c 		outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD);
PIC_MASTER_CMD    185 arch/x86/kernel/i8259.c 		outb(0x60+irq, PIC_MASTER_CMD);	/* 'Specific EOI to master */
PIC_MASTER_CMD    323 arch/x86/kernel/i8259.c 	outb_pic(0x11, PIC_MASTER_CMD);	/* ICW1: select 8259A-1 init */
PIC_MASTER_CMD     15 include/asm-x86/i8259.h #define PIC_MASTER_ISR		PIC_MASTER_CMD