M32R_ICU_OFFSET 171 include/asm-m32r/m32102.h #define M32R_ICU_ISTS_PORTL (0x004+M32R_ICU_OFFSET) M32R_ICU_OFFSET 172 include/asm-m32r/m32102.h #define M32R_ICU_IREQ0_PORTL (0x008+M32R_ICU_OFFSET) M32R_ICU_OFFSET 173 include/asm-m32r/m32102.h #define M32R_ICU_IREQ1_PORTL (0x00C+M32R_ICU_OFFSET) M32R_ICU_OFFSET 174 include/asm-m32r/m32102.h #define M32R_ICU_SBICR_PORTL (0x018+M32R_ICU_OFFSET) M32R_ICU_OFFSET 175 include/asm-m32r/m32102.h #define M32R_ICU_IMASK_PORTL (0x01C+M32R_ICU_OFFSET) M32R_ICU_OFFSET 176 include/asm-m32r/m32102.h #define M32R_ICU_CR1_PORTL (0x200+M32R_ICU_OFFSET) /* INT0 */ M32R_ICU_OFFSET 177 include/asm-m32r/m32102.h #define M32R_ICU_CR2_PORTL (0x204+M32R_ICU_OFFSET) /* INT1 */ M32R_ICU_OFFSET 178 include/asm-m32r/m32102.h #define M32R_ICU_CR3_PORTL (0x208+M32R_ICU_OFFSET) /* INT2 */ M32R_ICU_OFFSET 179 include/asm-m32r/m32102.h #define M32R_ICU_CR4_PORTL (0x20C+M32R_ICU_OFFSET) /* INT3 */ M32R_ICU_OFFSET 180 include/asm-m32r/m32102.h #define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */ M32R_ICU_OFFSET 181 include/asm-m32r/m32102.h #define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */ M32R_ICU_OFFSET 182 include/asm-m32r/m32102.h #define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */ M32R_ICU_OFFSET 183 include/asm-m32r/m32102.h #define M32R_ICU_CR8_PORTL (0x219+M32R_ICU_OFFSET) /* INT7 */ M32R_ICU_OFFSET 184 include/asm-m32r/m32102.h #define M32R_ICU_CR16_PORTL (0x23C+M32R_ICU_OFFSET) /* MFT0 */ M32R_ICU_OFFSET 185 include/asm-m32r/m32102.h #define M32R_ICU_CR17_PORTL (0x240+M32R_ICU_OFFSET) /* MFT1 */ M32R_ICU_OFFSET 186 include/asm-m32r/m32102.h #define M32R_ICU_CR18_PORTL (0x244+M32R_ICU_OFFSET) /* MFT2 */ M32R_ICU_OFFSET 187 include/asm-m32r/m32102.h #define M32R_ICU_CR19_PORTL (0x248+M32R_ICU_OFFSET) /* MFT3 */ M32R_ICU_OFFSET 188 include/asm-m32r/m32102.h #define M32R_ICU_CR20_PORTL (0x24C+M32R_ICU_OFFSET) /* MFT4 */ M32R_ICU_OFFSET 189 include/asm-m32r/m32102.h #define M32R_ICU_CR21_PORTL (0x250+M32R_ICU_OFFSET) /* MFT5 */ M32R_ICU_OFFSET 190 include/asm-m32r/m32102.h #define M32R_ICU_CR32_PORTL (0x27C+M32R_ICU_OFFSET) /* DMA0 */ M32R_ICU_OFFSET 191 include/asm-m32r/m32102.h #define M32R_ICU_CR33_PORTL (0x280+M32R_ICU_OFFSET) /* DMA1 */ M32R_ICU_OFFSET 192 include/asm-m32r/m32102.h #define M32R_ICU_CR48_PORTL (0x2BC+M32R_ICU_OFFSET) /* SIO0 */ M32R_ICU_OFFSET 193 include/asm-m32r/m32102.h #define M32R_ICU_CR49_PORTL (0x2C0+M32R_ICU_OFFSET) /* SIO0 */ M32R_ICU_OFFSET 194 include/asm-m32r/m32102.h #define M32R_ICU_CR50_PORTL (0x2C4+M32R_ICU_OFFSET) /* SIO1 */ M32R_ICU_OFFSET 195 include/asm-m32r/m32102.h #define M32R_ICU_CR51_PORTL (0x2C8+M32R_ICU_OFFSET) /* SIO1 */ M32R_ICU_OFFSET 196 include/asm-m32r/m32102.h #define M32R_ICU_CR52_PORTL (0x2CC+M32R_ICU_OFFSET) /* SIO2 */ M32R_ICU_OFFSET 197 include/asm-m32r/m32102.h #define M32R_ICU_CR53_PORTL (0x2D0+M32R_ICU_OFFSET) /* SIO2 */ M32R_ICU_OFFSET 198 include/asm-m32r/m32102.h #define M32R_ICU_CR54_PORTL (0x2D4+M32R_ICU_OFFSET) /* SIO3 */ M32R_ICU_OFFSET 199 include/asm-m32r/m32102.h #define M32R_ICU_CR55_PORTL (0x2D8+M32R_ICU_OFFSET) /* SIO3 */ M32R_ICU_OFFSET 200 include/asm-m32r/m32102.h #define M32R_ICU_CR56_PORTL (0x2DC+M32R_ICU_OFFSET) /* SIO4 */ M32R_ICU_OFFSET 201 include/asm-m32r/m32102.h #define M32R_ICU_CR57_PORTL (0x2E0+M32R_ICU_OFFSET) /* SIO4 */ M32R_ICU_OFFSET 204 include/asm-m32r/m32102.h #define M32R_ICU_IPICR0_PORTL (0x2dc+M32R_ICU_OFFSET) /* IPI0 */ M32R_ICU_OFFSET 205 include/asm-m32r/m32102.h #define M32R_ICU_IPICR1_PORTL (0x2e0+M32R_ICU_OFFSET) /* IPI1 */ M32R_ICU_OFFSET 206 include/asm-m32r/m32102.h #define M32R_ICU_IPICR2_PORTL (0x2e4+M32R_ICU_OFFSET) /* IPI2 */ M32R_ICU_OFFSET 207 include/asm-m32r/m32102.h #define M32R_ICU_IPICR3_PORTL (0x2e8+M32R_ICU_OFFSET) /* IPI3 */ M32R_ICU_OFFSET 208 include/asm-m32r/m32102.h #define M32R_ICU_IPICR4_PORTL (0x2ec+M32R_ICU_OFFSET) /* IPI4 */ M32R_ICU_OFFSET 209 include/asm-m32r/m32102.h #define M32R_ICU_IPICR5_PORTL (0x2f0+M32R_ICU_OFFSET) /* IPI5 */ M32R_ICU_OFFSET 210 include/asm-m32r/m32102.h #define M32R_ICU_IPICR6_PORTL (0x2f4+M32R_ICU_OFFSET) /* IPI6 */ M32R_ICU_OFFSET 211 include/asm-m32r/m32102.h #define M32R_ICU_IPICR7_PORTL (0x2f8+M32R_ICU_OFFSET) /* IPI7 */ M32R_ICU_OFFSET 214 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_ISTS_PORTL (0x004+M32R_ICU_OFFSET) M32R_ICU_OFFSET 215 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_IREQ0_PORTL (0x008+M32R_ICU_OFFSET) M32R_ICU_OFFSET 216 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_IREQ1_PORTL (0x00C+M32R_ICU_OFFSET) M32R_ICU_OFFSET 217 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_SBICR_PORTL (0x018+M32R_ICU_OFFSET) M32R_ICU_OFFSET 218 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_IMASK_PORTL (0x01C+M32R_ICU_OFFSET) M32R_ICU_OFFSET 219 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR1_PORTL (0x200+M32R_ICU_OFFSET) /* INT0 */ M32R_ICU_OFFSET 220 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR2_PORTL (0x204+M32R_ICU_OFFSET) /* INT1 */ M32R_ICU_OFFSET 221 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR3_PORTL (0x208+M32R_ICU_OFFSET) /* INT2 */ M32R_ICU_OFFSET 222 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR4_PORTL (0x20C+M32R_ICU_OFFSET) /* INT3 */ M32R_ICU_OFFSET 223 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */ M32R_ICU_OFFSET 224 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */ M32R_ICU_OFFSET 225 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */ M32R_ICU_OFFSET 226 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR8_PORTL (0x218+M32R_ICU_OFFSET) /* INT7 */ M32R_ICU_OFFSET 227 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR32_PORTL (0x27C+M32R_ICU_OFFSET) /* SIO0 RX */ M32R_ICU_OFFSET 228 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR33_PORTL (0x280+M32R_ICU_OFFSET) /* SIO0 TX */ M32R_ICU_OFFSET 229 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR40_PORTL (0x29C+M32R_ICU_OFFSET) /* DMAC0 */ M32R_ICU_OFFSET 230 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR41_PORTL (0x2A0+M32R_ICU_OFFSET) /* DMAC1 */ M32R_ICU_OFFSET 231 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR48_PORTL (0x2BC+M32R_ICU_OFFSET) /* MFT0 */ M32R_ICU_OFFSET 232 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR49_PORTL (0x2C0+M32R_ICU_OFFSET) /* MFT1 */ M32R_ICU_OFFSET 233 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR50_PORTL (0x2C4+M32R_ICU_OFFSET) /* MFT2 */ M32R_ICU_OFFSET 234 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR51_PORTL (0x2C8+M32R_ICU_OFFSET) /* MFT3 */ M32R_ICU_OFFSET 235 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR52_PORTL (0x2CC+M32R_ICU_OFFSET) /* MFT4 */ M32R_ICU_OFFSET 236 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_CR53_PORTL (0x2D0+M32R_ICU_OFFSET) /* MFT5 */ M32R_ICU_OFFSET 237 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_IPICR0_PORTL (0x2DC+M32R_ICU_OFFSET) /* IPI0 */ M32R_ICU_OFFSET 238 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_IPICR1_PORTL (0x2E0+M32R_ICU_OFFSET) /* IPI1 */ M32R_ICU_OFFSET 239 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_IPICR2_PORTL (0x2E4+M32R_ICU_OFFSET) /* IPI2 */ M32R_ICU_OFFSET 240 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_IPICR3_PORTL (0x2E8+M32R_ICU_OFFSET) /* IPI3 */ M32R_ICU_OFFSET 241 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_IPICR4_PORTL (0x2EC+M32R_ICU_OFFSET) /* IPI4 */ M32R_ICU_OFFSET 242 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_IPICR5_PORTL (0x2F0+M32R_ICU_OFFSET) /* IPI5 */ M32R_ICU_OFFSET 243 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_IPICR6_PORTL (0x2F4+M32R_ICU_OFFSET) /* IPI6 */ M32R_ICU_OFFSET 244 include/asm-m32r/m32r_mp_fpga.h #define M32R_ICU_IPICR7_PORTL (0x2FC+M32R_ICU_OFFSET) /* IPI7 */