snd_miro_write_mask 979 sound/isa/opti9xx/miro.c snd_miro_write_mask(chip, OPTi9XX_MC_REG(6), 0x02, 0x02); snd_miro_write_mask 980 sound/isa/opti9xx/miro.c snd_miro_write_mask(chip, OPTi9XX_MC_REG(1), 0x80, 0x80); snd_miro_write_mask 981 sound/isa/opti9xx/miro.c snd_miro_write_mask(chip, OPTi9XX_MC_REG(2), 0x20, 0x20); /* OPL4 */ snd_miro_write_mask 982 sound/isa/opti9xx/miro.c snd_miro_write_mask(chip, OPTi9XX_MC_REG(3), 0xf0, 0xff); snd_miro_write_mask 983 sound/isa/opti9xx/miro.c snd_miro_write_mask(chip, OPTi9XX_MC_REG(5), 0x02, 0x02); snd_miro_write_mask 987 sound/isa/opti9xx/miro.c snd_miro_write_mask(chip, OPTi9XX_MC_REG(1), 0x80, 0x80); snd_miro_write_mask 988 sound/isa/opti9xx/miro.c snd_miro_write_mask(chip, OPTi9XX_MC_REG(2), 0x20, 0x20); /* OPL4 */ snd_miro_write_mask 989 sound/isa/opti9xx/miro.c snd_miro_write_mask(chip, OPTi9XX_MC_REG(4), 0x00, 0x0c); snd_miro_write_mask 990 sound/isa/opti9xx/miro.c snd_miro_write_mask(chip, OPTi9XX_MC_REG(5), 0x02, 0x02); snd_miro_write_mask 1014 sound/isa/opti9xx/miro.c snd_miro_write_mask(chip, OPTi9XX_MC_REG(1), wss_base_bits << 4, 0x30); snd_miro_write_mask 1115 sound/isa/opti9xx/miro.c snd_miro_write_mask(chip, OPTi9XX_MC_REG(6),