REG_WR_ADDR_iop_sw_mpu_rw_gio_oe_clr_mask  252 include/asm-cris/arch-v32/hwregs/iop/iop_sw_mpu_defs.h #define REG_WR_ADDR_iop_sw_mpu_rw_gio_oe_clr_mask 76
REG_WR_ADDR_iop_sw_mpu_rw_gio_oe_clr_mask  208 include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_mpu_defs.h #define REG_WR_ADDR_iop_sw_mpu_rw_gio_oe_clr_mask 64