REG_WR_ADDR_iop_sw_mpu_rw_gio_clr_mask  238 include/asm-cris/arch-v32/hwregs/iop/iop_sw_mpu_defs.h #define REG_WR_ADDR_iop_sw_mpu_rw_gio_clr_mask 68
REG_WR_ADDR_iop_sw_mpu_rw_gio_clr_mask  194 include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_mpu_defs.h #define REG_WR_ADDR_iop_sw_mpu_rw_gio_clr_mask 56