REG_RD_ADDR_iop_sw_spu_rw_gio_oe_clr_mask_hi  374 include/asm-cris/arch-v32/hwregs/iop/iop_sw_spu_defs.h #define REG_RD_ADDR_iop_sw_spu_rw_gio_oe_clr_mask_hi 136
REG_RD_ADDR_iop_sw_spu_rw_gio_oe_clr_mask_hi  290 include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_spu_defs.h #define REG_RD_ADDR_iop_sw_spu_rw_gio_oe_clr_mask_hi 104