REG_RD_ADDR_iop_sw_mpu_rw_intr_grp1_mask  505 include/asm-cris/arch-v32/hwregs/iop/iop_sw_mpu_defs.h #define REG_RD_ADDR_iop_sw_mpu_rw_intr_grp1_mask 112
REG_RD_ADDR_iop_sw_mpu_rw_intr_grp1_mask  397 include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_mpu_defs.h #define REG_RD_ADDR_iop_sw_mpu_rw_intr_grp1_mask 100