ICH_REG_          113 sound/pci/intel8x0.c ICH_REG_##name##_BDBAR	= base + 0x0,	/* dword - buffer descriptor list base address */ \
ICH_REG_          114 sound/pci/intel8x0.c ICH_REG_##name##_CIV	= base + 0x04,	/* byte - current index value */ \
ICH_REG_          115 sound/pci/intel8x0.c ICH_REG_##name##_LVI	= base + 0x05,	/* byte - last valid index */ \
ICH_REG_          116 sound/pci/intel8x0.c ICH_REG_##name##_SR	= base + 0x06,	/* byte - status register */ \
ICH_REG_          117 sound/pci/intel8x0.c ICH_REG_##name##_PICB	= base + 0x08,	/* word - position in current buffer */ \
ICH_REG_          118 sound/pci/intel8x0.c ICH_REG_##name##_PIV	= base + 0x0a,	/* byte - prefetched index value */ \
ICH_REG_          119 sound/pci/intel8x0.c ICH_REG_##name##_CR	= base + 0x0b,	/* byte - control register */ \
ICH_REG_           83 sound/pci/intel8x0m.c ICH_REG_##name##_BDBAR	= base + 0x0,	/* dword - buffer descriptor list base address */ \
ICH_REG_           84 sound/pci/intel8x0m.c ICH_REG_##name##_CIV	= base + 0x04,	/* byte - current index value */ \
ICH_REG_           85 sound/pci/intel8x0m.c ICH_REG_##name##_LVI	= base + 0x05,	/* byte - last valid index */ \
ICH_REG_           86 sound/pci/intel8x0m.c ICH_REG_##name##_SR	= base + 0x06,	/* byte - status register */ \
ICH_REG_           87 sound/pci/intel8x0m.c ICH_REG_##name##_PICB	= base + 0x08,	/* word - position in current buffer */ \
ICH_REG_           88 sound/pci/intel8x0m.c ICH_REG_##name##_PIV	= base + 0x0a,	/* byte - prefetched index value */ \
ICH_REG_           89 sound/pci/intel8x0m.c ICH_REG_##name##_CR	= base + 0x0b,	/* byte - control register */ \