regk_iop_sw_spu_rw_bus0_clr_mask_default 676 include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_spu_defs_asm.h #define regk_iop_sw_spu_rw_bus0_clr_mask_default 0x00000000 regk_iop_sw_spu_rw_bus0_clr_mask_default 536 include/asm-cris/arch-v32/hwregs/iop/iop_sw_spu_defs.h regk_iop_sw_spu_rw_bus0_clr_mask_default = 0x00000000,