regk_iop_sw_mpu_rw_gio_clr_mask_default 1762 include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_mpu_defs_asm.h #define regk_iop_sw_mpu_rw_gio_clr_mask_default   0x00000000
regk_iop_sw_mpu_rw_gio_clr_mask_default  878 include/asm-cris/arch-v32/hwregs/iop/iop_sw_mpu_defs.h regk_iop_sw_mpu_rw_gio_clr_mask_default  = 0x00000000,
regk_iop_sw_mpu_rw_gio_clr_mask_default 1073 include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_mpu_defs_asm.h #define regk_iop_sw_mpu_rw_gio_clr_mask_default   0x00000000
regk_iop_sw_mpu_rw_gio_clr_mask_default  634 include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_mpu_defs.h regk_iop_sw_mpu_rw_gio_clr_mask_default  = 0x00000000,