regk_iop_sw_cpu_rw_gio_clr_mask_default 1748 include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cpu_defs_asm.h #define regk_iop_sw_cpu_rw_gio_clr_mask_default   0x00000000
regk_iop_sw_cpu_rw_gio_clr_mask_default  842 include/asm-cris/arch-v32/hwregs/iop/iop_sw_cpu_defs.h regk_iop_sw_cpu_rw_gio_clr_mask_default  = 0x00000000,
regk_iop_sw_cpu_rw_gio_clr_mask_default  942 include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_cpu_defs_asm.h #define regk_iop_sw_cpu_rw_gio_clr_mask_default   0x00000000
regk_iop_sw_cpu_rw_gio_clr_mask_default  513 include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_cpu_defs.h regk_iop_sw_cpu_rw_gio_clr_mask_default  = 0x00000000,