reg_iop_sw_spu_rw_gio_set_mask___val___width  230 include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_spu_defs_asm.h #define reg_iop_sw_spu_rw_gio_set_mask___val___width 32
reg_iop_sw_spu_rw_gio_set_mask___val___width  166 include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_spu_defs_asm.h #define reg_iop_sw_spu_rw_gio_set_mask___val___width 32