reg_iop_sw_spu_rw_gio_set_mask  235 include/asm-cris/arch-v32/hwregs/iop/iop_sw_spu_defs.h } reg_iop_sw_spu_rw_gio_set_mask;
reg_iop_sw_spu_rw_gio_set_mask  187 include/asm-cris/arch-v32/mach-a3/hwregs/iop/iop_sw_spu_defs.h } reg_iop_sw_spu_rw_gio_set_mask;