reg_iop_sw_spu_rw_gio_oe_set_mask_hi_offset  340 include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_spu_defs_asm.h #define reg_iop_sw_spu_rw_gio_oe_set_mask_hi_offset 144
reg_iop_sw_spu_rw_gio_oe_set_mask_hi_offset  248 include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_spu_defs_asm.h #define reg_iop_sw_spu_rw_gio_oe_set_mask_hi_offset 112