reg_iop_sw_spu_rw_gio_oe_clr_mask___val___lsb  234 include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_spu_defs_asm.h #define reg_iop_sw_spu_rw_gio_oe_clr_mask___val___lsb 0
reg_iop_sw_spu_rw_gio_oe_clr_mask___val___lsb  170 include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_spu_defs_asm.h #define reg_iop_sw_spu_rw_gio_oe_clr_mask___val___lsb 0