reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp4___bit  857 include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_mpu_defs_asm.h #define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp4___bit 27
reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp4___bit  562 include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_mpu_defs_asm.h #define reg_iop_sw_mpu_rw_intr_grp1_mask___trigger_grp4___bit 1