reg_iop_sw_mpu_rw_gio_oe_clr_mask_offset  241 include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_mpu_defs_asm.h #define reg_iop_sw_mpu_rw_gio_oe_clr_mask_offset 76
reg_iop_sw_mpu_rw_gio_oe_clr_mask_offset  180 include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_mpu_defs_asm.h #define reg_iop_sw_mpu_rw_gio_oe_clr_mask_offset 64