reg_iop_sw_cpu_rw_intr0_mask___mpu_5___lsb  262 include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cpu_defs_asm.h #define reg_iop_sw_cpu_rw_intr0_mask___mpu_5___lsb 5
reg_iop_sw_cpu_rw_intr0_mask___mpu_5___lsb  204 include/asm-cris/arch-v32/mach-a3/hwregs/iop/asm/iop_sw_cpu_defs_asm.h #define reg_iop_sw_cpu_rw_intr0_mask___mpu_5___lsb 5